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TS-8820-BOX
TS-8820.jpg
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TS-8820 source directory
Dimensions (in enclosure)
6.35 inches (tall) by 7.714 inches (wide including DB9) by 1.14 inches (deep)

Contents

1 Overview

The TS-8820-BOX is a rugged, feature-rich TS-SOCKET based baseboard and Macrocontroller combination for industrial applications. The TS-8820-BOX is powered by the TS-4100, TS-4700, TS-4710, TS-4720 or TS-4800 Computer-on-Module devices. The TS-8820-BOX enclosure exposes all of the available I/O on rugged screw terminals while protecting the CoM and other sensitive electronics. The TS-8820-BOX a tough, durable, flexible, powerful, and affordable industrial process control platform.

The TS-4100 is a TS-SOCKET Macrocontroller Computer on Module designed for low power applications. It is based around an NXP i.MX6UL 696 MHz CPU with 512 MB or 1GB DDR3 RAM. The TS-4100 can be ordered with soldered down WiFi which includes built in Bluetooth 4.0LE. There is also support for USB Gadget via a micro USB AB OTG connector and eMMC flash for a robust soldered down flash solution.

The TS-4100 can run standalone, powered via the micro USB AB connector. This allows for a small, low power device with built in Wi-Fi and 4.0LE interfaces and a combination of soldered down flash as well as support for microSD cards. Additionally, the same micro USB AB connector for power is also an OTG port, allowing for USB ethernet or other gadget connections to be made to the device.


1.1 TS-4100

See the TS-4100 page for functionality regarding the CPU, FPGA, and OS.

TS-4100
NXP i.MX6ul 696 MHz Cortex-A7 (ARMv7)


2 Getting Started

A Linux PC is recommended for development, and will be assumed for this documentation. For users in Windows or OSX we recommend virtualizing a Linux PC. Most of our platforms run Debian and if there is no personal distribution preference this is what we recommend for ease of use.

Virtualization

Suggested Linux Distributions

It may be possible to develop using a Windows or OSX system, but this is not supported. Development will include accessing drives formatted for Linux and often Linux based tools.


2.1 Booting up the board

The TS-8820-4100 accepts 10 V to 30 V DC connected directly to the terminal block inputs, as well as IEEE 802.3af PoE. See the Power Supply section for detailed information on powering the device.

Power input to the TS-4100 TS-SOCKET requires a single 5 V source from the baseboard (which may be regulated from other voltage ranges). Refer to the TS-SOCKET Connector section for information on power pins.

The unit can also be powered standalone from 5 V via the micro USB AB port labeled "P1" when in standalone and not attached to a baseboard. This connector is mechanically locked out on many of our baseboards to prevent powering the device from multiple sources.

Once power is applied to the whole device, there will be output on the debug console port. The following section of the manual provides information on getting the serial console connected. The first output is from U-Boot and will resemble the following when booting from SD card:

U-Boot 2016.03-00367-gb3ce405827 (Jul 02 2019 - 16:40:10 -0700)

CPU:   Freescale i.MX6UL rev1.1 at 396 MHz
Reset cause: POR
Board: Technologic Systems TS-4100
FPGA:  Rev 11
Silab: Rev 2
I2C:   ready
DRAM:  1 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Baseboard ID: 0x8
Baseboard Rev: 0
Net:   FEC0 [PRIME]
Press Ctrl+C to abort autoboot in 1 second(s)
starting USB...
USB0:   USB EHCI 1.00
scanning bus 0 for devices... 1 USB Device(s) found
USB1:   USB EHCI 1.00
scanning bus 1 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found
No storage devices, perhaps not 'usb start'ed..?
Booting from the SD card ...
** File not found /boot/boot.scr **
** File not found /boot/ts4100-fpga.vme **
29205 bytes read in 146 ms (195.3 KiB/s)
8 detected
5244088 bytes read in 390 ms (12.8 MiB/s)
Kernel image @ 0x80800000 [ 0x000000 - 0x5004b8 ]
## Flattened Device Tree blob at 83000000
   Booting using the fdt blob at 0x83000000
   Using Device Tree in place at 83000000, end 8300a214

Starting kernel ...
Note: The "*** Warning - bad CRC, using default environment" message can be safely ignored when the unit is first booted. This means that no environment variables have been saved to disk, and U-Boot is falling back to the default. If "env save" is run, this will save the environment to disk, and this message will go away unless there is a further issue.


The default U-Boot boot process will check for USB updates, and then will check the "SD Boot" jumper state if it exists. If the "SD boot" jumper is set, it will boot to the Linux on the SD card, otherwise it will boot to the eMMC. Details about the bootup process, features, and other U-Boot information can be found in the U-Boot sections.


2.2 Power Supply

The TS-8820 can be powered via PoE or direct DC voltage input to the terminal block connectors. If PoE is not used, power must be supplied on terminal block P6.

2.2.1 DC via Terminal Blocks

Direct power input can be applied to the P6 terminal block. There are three terminals for power and three for a ground connection. Each of the three sets of terminals are electrically connected together internally in the TS-8820. Operational range of the TS-8820 is +10 VDC to +30 VDC on these inputs. Supply an external ground on terminal 10, 11, and/or 12. Supply +10 V to +30 V on terminal 7, 8, and/or 9.

2.2.2 802.3af PoE

The TS-8820 is IEEE 802.3af PoE compliant. This allows the whole unit to be powered directly from a PoE sourcing device.

When powered via PoE, +24 VDC is made available on the P6 terminal block power terminals. Ensure that the total power draw of the system does not exceed the limits defined by IEEE 802.3af and that power is not also supplied to the TS-8820 on these pins!


2.3 Get a Console

The TS-8820-4100 offers an RS-232 level console UART on the DB-9 connector. The console UART runs at 115200 baud, 8n1 (8 data bits, no parity, 1 stop bit), with no flow control.

By default, all system messages and a Linux login prompt are output on this interface. It is a "DTE" port, meaning it is equivalent to the same port on a PC/Desktop/Workstation. Due to this, a NULL MODEM cable is required to interface from a host PC to the TS-8820-4100. This port can be used for application purposes, for example to interface with a "DCE" serial device. However the login prompt and kernel information must be disabled. Additionally, note that it is not possible to disable the U-Boot output on this port; any connected devices must be able to handle this text output safely.


Console from Linux

There are many serial terminal applications for Linux, three common used applications are 'picocom', 'screen', and 'minicom'. These examples demonstrate all three applications and assume that the serial device is "/dev/ttyUSB0" which is common for USB adapters. Be sure to replace the serial device string with that of the device on your workstation.

'picocom' is a very small and simple client.

picocom -b 115200 /dev/ttyUSB0


'screen' is a terminal multiplexer which happens to have serial support.

screen /dev/ttyUSB0 115200


Or a very commonly used client is 'minicom' which is quite powerful but requires some setup:

minicom -s
  • Navigate to 'serial port setup'
  • Type "a" and change location of serial device to '/dev/ttyUSB0' then hit "enter"
  • If needed, modify the settings to match this and hit "esc" when done:
     E - Bps/Par/Bits          : 115200 8N1
     F - Hardware Flow Control : No
     G - Software Flow Control : No
  • Navigate to 'Save setup as dfl', hit "enter", and then "esc"


Console from Windows

Putty is a small simple client available for download here. Open up Device Manager to determine your console port. See the putty configuration image for more details.

Device Manager Putty Configuration


  • Connect the console serial terminal cable
  • Connect the Ethernet cable if applicable.
  • Monitor the device bootup using a terminal emulator connected to the serial console port to verify that the board is operating properly

See the TS-4100 page for more details on dealing with the functionality of the CoM.

3 U-Boot

This platform includes U-Boot as the bootloader to load and boot the full operating system. The i.MX6UL processor loads U-Boot from the eMMC flash at power-on. U-Boot allows booting images from the microSD, eMMC, NFS, or USB. U-Boot is a general purpose bootloader that is capable of booting into common Linux distributions, Android, QNX, or others.

On a normal boot, output from U-Boot will be similar to the following:

U-Boot 2016.03-00367-gb3ce405827 (Jul 02 2019 - 16:40:10 -0700)

CPU:   Freescale i.MX6UL rev1.1 at 396 MHz
Reset cause: POR
Board: Technologic Systems TS-4100
FPGA:  Rev 11
Silab: Rev 2
I2C:   ready
DRAM:  1 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Baseboard ID: 0x8
Baseboard Rev: 0
Net:   FEC0 [PRIME]
Press Ctrl+C to abort autoboot in 1 second(s)
starting USB...
USB0:   USB EHCI 1.00
scanning bus 0 for devices... 1 USB Device(s) found
USB1:   USB EHCI 1.00
scanning bus 1 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found
No storage devices, perhaps not 'usb start'ed..?
Booting from the SD card ...
** File not found /boot/boot.scr **
** File not found /boot/ts4100-fpga.vme **
29205 bytes read in 146 ms (195.3 KiB/s)
8 detected
5244088 bytes read in 390 ms (12.8 MiB/s)
Kernel image @ 0x80800000 [ 0x000000 - 0x5004b8 ]
## Flattened Device Tree blob at 83000000
   Booting using the fdt blob at 0x83000000
   Using Device Tree in place at 83000000, end 8300a214

Starting kernel ...

The TS-8820 has an "SD Boot" jumper to control the boot source via hardware. It is also possible to modify the U-Boot environment variable "bootcmd" to set the whole device to boot to SD, eMMC, NFS, or USB by default.


3.1 Entering U-Boot Shell

The U-Boot shell is a powerful tool. It allows modification of the environment, as well as the ability to run commands directly.

When the TS-8820-4100 is booted, a prompt is provided by U-Boot to press "ctrl+c" followed by a 1 second window. If "ctrl+c" is found incoming on the serial terminal within this time window then U-Boot will drop to its shell. This behavior can be modified by setting the U-Boot environment variable "force_bootdelay". Normally this variable does not exist in U-Boot environment, if it does, it will force the timeout for pressing "ctrl+c" to be however many seconds the variable is set to. If it is set to 0, then the "ctrl+c" prompt is skipped.


The baseboard offers a push switch. This button can be held down before applying power, and at least 5 seconds after power is applied. Doing do will cause U-Boot to read a script file from an attached USB mass storage device before dropping to the U-Boot shell.

This allows for out of the box functionality and customized production via a USB drive. In order to provide increased security, the push switch entry to U-Boot can be disabled via the U-Boot environment variable "rstuboot". The following U-Boot commands can be used to disable the push switch check, thereby preventing it from entering the U-Boot shell.

env set rstuboot 0
env save

Removing the U-Boot environment variable, or setting it to a 1, will re-enable the ability for the push switch to interrupt U-Boot and drop to its shell.


Note: Use caution when setting both "force_bootdelay" and "rstuboot". By setting a value of 0 to both of them, it is no longer possible to enter the U-Boot shell without booting the device on a compatible baseboard that has a "U-Boot" jumper!


3.2 U-Boot Environment

The eMMC flash contains both the U-Boot executable binary and U-Boot environment. Our default build has 2 MiB of environment space which can be used for variables and boot scripts. The following commands are examples of how to manipulate the U-Boot environment:

# Print all environment variables
env print -a
 
# Sets the variable bootdelay to 5 seconds
env set bootdelay 5;
 
# Variables can also contain commands
env set hellocmd 'led red on; echo Hello world; led green on;'
 
# Execute commands saved in a variable
env run hellocmd;
 
# Commit environment changes to the SPI flash
# Otherwise changes are lost
env save
 
# Restore environment to default
env default -a
 
# Remove a variable
env delete emmcboot


3.3 U-Boot Commands

# The most important command is 
help
# This can also be used to see more information on a specific command
help i2c
 
# This is a command added to U-Boot by TS to read the baseboard ID on our 
# Computer on Module devices
bbdetect
echo ${baseboard} ${baseboardid} 
# The echo will return something similar to:
# TS-8390 2
 
# Boots into the binary at $loadaddr.  The loaded file needs to have
# the U-Boot header from mkimage.  A uImage already contains this.
bootm
# Boots into the binary at $loadaddr, skips the initrd, specifies
# the FDT addrress so Linux knows where to find the device tree
bootm ${loadaddr} - ${fdtaddr}
 
# Boot a Linux zImage loaded at $loadaddr
bootz
# Boot in to a Linux zImage at $loadaddr, skip initrd, specifies
# the FDT address to Linux knows where to find the device tree
bootz ${loadaddr} - ${fdtaddr}
 
# Get a DHCP address
dhcp
# This sets ${ipaddr}, ${dnsip}, ${gatewayip}, ${netmask}
# and ${ip_dyn} which can be used to check if the dhcp was successful
 
# These commands are used for scripting:
false # do nothing, unsuccessfully
true # do nothing, successfully
 
# This command can set fuses in the processor
# Setting fuses can brick the unit, will void the warranty,
# and should not be done in most cases
fuse
 
# GPIO can be manipulated from U-Boot.  Keep in mind that the IOMUX 
# in U-Boot is only setup enough to boot the device, so not all pins will
# be set to GPIO mode out of the box.  Boot to the full operating system
# for more GPIO support.
# GPIO are specified in bank and IO in this manual.  U-Boot uses a flat numberspace,
# so for bank 2 DIO 25, this would be number (32*2)+25=89
# Note that on some products, bank 1 is the first bank
# Set 2_25 low
gpio clear 83
# Set 2_25 high
gpio set 83
# Read 2_25
gpio input 83
 
# Control LEDs
led red on
led green on
led all off
led red toggle
 
# This command is used to copy a file from most devices
# Load kernel from SD
load mmc 0:1 ${loadaddr} /boot/uImage
# Load Kernel from eMMC
load mmc 1:1 ${loadaddr} /boot/uImage
# Load kernel from USB
usb start
load usb 0:1 ${loadaddr} /boot/uImage
# Load kernel from SATA
sata init
load sata 0:1 ${loadaddr} /boot/uImage
 
# View the FDT from U-Boot
load mmc 0:1 ${fdtaddr} /boot/imx6q-ts4900.dtb
fdt addr ${fdtaddr}
fdt print
 
# It is possible to blindly jump to any memory location
# This is similar to bootm, but it does not require
# the use of the U-Boot header
load mmc 0:1 ${loadaddr} /boot/custombinary
go ${loadaddr}
 
# Browse fat, ext2, ext3, or ext4 filesystems:
ls mmc 0:1 /
 
# Access memory like devmem in Linux, read/write arbitrary memory
# using mw and md
# write
mw 0x10000000 0xc0ffee00 1
# read
md 0x10000000 1
 
# Test memory.
mtest
 
# Check for new SD card
mmc rescan
# Read SD card size
mmc dev 0
mmcinfo
# Read eMMC Size
mmc dev 1
mmcinfo
 
# The NFS command is like 'load', but used over the network
dhcp
env set serverip 192.168.0.11
nfs ${loadaddr} 192.168.0.11:/path/to/somefile
 
# Test ICMP
dhcp
ping 192.168.0.11
 
# Reboot
reset
 
# SPI access is through the SF command
# Be careful with sf commands since
# this is where U-Boot and the FPGA bitstream exist
# Improper use can render the board unbootable
sf probe
 
# Delay in seconds
sleep 10
 
# Load HUSH scripts that have been created with mkimage
load mmc 0:1 ${loadaddr} /boot/ubootscript
source ${loadaddr}
 
# Most commands have return values that can be used to test
# success, and HUSH scripting supports comparisons like
# test in Bash, but much more minimal
if load mmc 1:1 ${fdtaddr} /boot/uImage;
	then echo Loaded Kernel
else
	echo Could not find kernel
fi
 
# Commands can be timed with "time"
time sf probe
 
# Print U-Boot version/build information
version


3.4 Modify Linux Kernel cmdline

The Linux kernel cmdline can be customized by modifying the cmdline_append variable. If new arguments are added, the existing value should also be included with the new arguments.

env set cmdline_append rw rootwait console=ttymxc0,115200 quiet
env save

The kernel command line can also be modified from from within Linux by creating a U-Boot script. From the Linux shell prompt run the following commands to install the necessary tools and create the script:

apt-get update && apt-get install u-boot-tools -y
echo "env set cmdline_append rw rootwait console=ttymxc0,115200 quiet" > /boot/boot.source
mkimage -A arm -T script -C none -n 'tsimx6ul boot script' -d /boot/boot.source /boot/boot.scr

The boot.source includes the plain text commands to be run in U-Boot on startup. The mkimage tool adds a checksum and header to the output file which then can be loaded by U-Boot. The .scr file should not be edited directly.

By default, every boot to SD, eMMC, and NFS will look for the file "/boot/boot.scr" and attempt to load and run it if it exists. This allows for modification of the boot process dynamically every boot without having to enter the U-Boot shell and modify it.


3.5 Linux NFS Boot

U-Boot's NFS support can be used to load a kernel, device tree binary, and root filesystem. The default scripts include an example NFS boot script. Because of the way U-Boot tries to infer server data, the script we use will bypass this, making it more straightforward to use an NFS root that will not be heavily dependent on a particular network configuration.

# Set this to your NFS server IP
env set nfsip 192.168.0.1
# Set this to your NFS root path
env set nfsroot /path/to/nfs/rootfs/
env save

To boot to NFS root once the server details are set:

# Boot to NFS once
run nfsboot;
 
# To make the NFS boot the persistent default
env set bootcmd run nfsboot;
env save
Note: 'bootcmd' is used to test for whether the system should stop at the U-Boot shell or continue, the above will make it difficult to get back to the U-Boot shell as it will always attempt to boot regardless of jumper status.


3.6 Linux USB Boot

By default, U-Boot will attempt to read a U-Boot script from a USB drive on every bootup. This process copies "/tsinit.scr" into memory and jumps in to the script.

This process is attempted on every boot unless it is disabled. It can be disabled by modifying the U-Boot environment variable "usbboot". If "usbboot" is set to 0 then this step will be bypassed on normal boot cycles. It is enabled by default to allow for a custom production process to be used. If the U-Boot shell is entered by holding down the push switch, this process will run. If the U-Boot shell is entered by pressing "ctrl+c" then this process is never run as autoboot is aborted and the shell is immediately returned. In this state, the USB boot process can always be manually started with the command 'run usbprod'.

To make a bootable drive, create a single ext3 partition on a USB drive and unpack the rootfs tarball located here

Additionally, a U-Boot script file, "tsinit.scr", must be created and placed in the root folder of this partition. In order to do this, a script must be created and converted to the U-Boot .scr format. This process requires a set of U-Boot specific tools. These tools are available on most every Linux distribution, the instructions below are for Debian, either on a host PC or on the device itself. See the package installation documentation for other respective distributions.

Install U-Boot tools in Debian

apt-get update && apt-get install u-boot-tools -y

Create the file "tsinit.source" in the root of the USB drive with the Linux filesystem:

# Prepare with:
# mkimage -A arm -T script -C none -n 'imx6ul usb' -d tsinit.source tsinit.scr
 
# DO NOT MANUALLY EDIT THE .scr FILE
 
if load usb 0:1 ${loadaddr} /boot/ts${model}-fpga.vme;
        then fpga load 0 ${loadaddr} ${filesize};
fi;
 
if load usb 0:1 ${fdtaddr} /boot/imx6ul-ts${model}-${baseboardid}.dtb;
        then echo "${baseboardid} detected;"
else echo "Booting default device tree";
        load usb 0:1 ${fdtaddr} /boot/imx6ul-ts${model}.dtb;
fi;
 
load usb 0:1 ${loadaddr} /boot/zImage;
setenv bootargs root=/dev/sda1 rootwait rw ${cmdline_append} bbid=0x${baseboardid} bbrev=0x${baseboardrev};
run silowaitcharge;
bootz ${loadaddr} - ${fdtaddr};
fi;

Then in the same directory generate the tsinit.scr file:

mkimage -A arm -T script -C none -n 'imx6ul usb' -d tsinit.source tsinit.scr

3.7 Update U-Boot

WARNING: Installing a custom U-Boot is not recommended and may cause the device to fail to boot.

The TS-4100 uses slightly different U-Boot binaries for the 512 MB and 1 GB RAM variants. This is due to different DDR timing that needs to be set up at the start of U-Boot. When updating U-Boot, be sure to use the script that exists in U-Boot discussed below as it will use the correct file name and will reduce any potential issues

The latest U-Boot binary can be downloaded from the TS-4100 FTP site. Copy these files to /boot/ on the 1st partition of the SD card (or eMMC). The U-Boot binary can be updated by inserting that SD card in to the TS-4100, setting the jumpers to boot from SD, power up the unit, and enter the U-Boot shell. At the U-Boot prompt, the following command can be used:

run update-uboot

The above script will use the /boot/u-boot-${imx_type}.imx file from the SD card or eMMC, depending on the state of the SD Boot jumper.


3.8 U-Boot Development

We do provide our U-Boot sources, but we do not recommend rebuilding a custom U-Boot binary as it can leave the system in an unbootable state.

If you still want to proceed with building a custom U-Boot, use the "tsimx_v2016.03_4.1.15_2.0.0_ga" branch from our github repo: https://github.com/embeddedarm/u-boot-imx

When compiling, we recommend using ONLY this cross-compiler, the use of any other compiler may cause issues. Specifically, we have experienced RAM problems when using a more recent cross compiler to build this version of U-Boot. The use of any other compiler may leave the system in an unbootable state!

export ARCH=arm
export CROSS_COMPILE=/path/to/folder/bin/arm-tsimx6ul-linux-gnueabihf-
 
./build-imx6ul.sh ts4100

This will output a binaries for 1 GB and 512 MB RAM variants that can be written to the device using the steps in Update U-Boot.


3.9 POST

The TS-4100 U-Boot includes a simple POST test. This is normally used in production to verify basic functionality rapidly before continuing to more thorough testing. By default, this is not enabled on every boot, but it can be added via U-Boot scripting if there is a need for additional confidence in the application. The POST test quickly verifies basic functionality of: USB, RTC (if present), Ethernet PHY, WiFi/BT module (if present), eMMC (see warning below), RAM, and the supervisory microcontroller.

The post test can be run with the following command in U-Boot:

post
WARNING: The 'post' command has an optional "-d" argument; when this argument is passed it does a write and readback test of the eMMC and any other soldered down flash media on the TS-4100 or baseboards which is DESTRUCTIVE to the data on the disk! Note that it will not modify the boot sector contents of the eMMC which is needed by U-Boot. The eMMC chip is still tested for basic functionality without the argument passed, but no data is read or written from the disk itself.

4 Debian

4.1 Debian Stretch(9)

4.1.1 Getting Started

The stock image uses a Debian Stretch distribution and Linux kernel version 4.9. The latest image can be downloaded below.

This image can then be written to a microSD card or the on-board eMMC flash in order to be booted on the TS-4100.

4.1.2 Debian Networking

Note: The first physical port on the TS-4100 (or on Baseboards with a single port) is given the name "eth1", while the second port is "eth0".


By default, Debian Stretch does not configure or bring up any interfaces.

Debian can automatically set up the networking based on the contents of "/etc/network/interfaces.d/" files. For example, to enable DHCP for "eth0" by default on startup:

echo "auto eth0
iface eth0 inet dhcp" > /etc/network/interfaces.d/eth0

To set up a static IP:

echo "auto eth0
iface eth0 inet static
    address 192.168.0.50
    netmask 255.255.255.0
    gateway 192.168.0.1" > /etc/network/interfaces.d/eth0
echo "nameserver 1.1.1.1" > /etc/resolv.conf

To make this take effect immediately:

service networking restart

To configure other interfaces, replace "eth0" with the other network device name. Some interfaces may use predictable interface names. For example, the traditional name for an ethernet port might be "eth1", but some devices may use "enp1s0" for PCIe, or "enx00D069C0FFEE" (the MAC address appended) for USB ethernet interfaces. Run 'ifconfig -a' or 'ip a' to get a complete list of interfaces, including the ones that are not configured.


4.1.2.1 Debian Wi-Fi Client

Wireless interfaces are also managed with configuration files in "/etc/network/interfaces.d/". For example, to connect as a client to a WPA network with DHCP.

Install wpa_supplicant:

apt-get update && apt-get install wpasupplicant -y

Run:

wpa_passphrase youressid yourpassword

This command will output information similar to:

 network={
 	ssid="youressid"
 	#psk="yourpassword"
 	psk=151790fab3bf3a1751a269618491b54984e192aa19319fc667397d45ec8dee5b
 }

Use the hashed PSK in the specific network interfaces file for added security:

echo "auto wlan0
iface wlan0 inet dhcp
    wpa-ssid youressid
    wpa-psk 151790fab3bf3a1751a269618491b54984e192aa19319fc667397d45ec8dee5b" > /etc/network/interfaces.d/wlan0

To have this take effect immediately:

service networking restart

For more information on configuring Wi-Fi, see Debian's guide here.


4.1.2.2 Debian Wi-Fi Access Point

This section will discuss setting up the WiFi device as an access point that is bridged to an ethernet port. That is, clients can connect to the AP and will be connected to the ethernet network through this network bridge. The ethernet network must provide a DHCP server; this will be passed through the bridge to WiFi client devices as they connect.

The 'hostapd' utility is used to manage the access point of the device. This is usually installed by default, but can be installed with:

apt-get update && apt-get install hostapd -y

Note: The install process may start an unconfigured 'hostapd' process. This process must be killed before moving forward.


Modify the file "/etc/hostapd/hostapd.conf" to have the following lines:

ssid=YourWiFiName
wpa_passphrase=Somepassphrase
interface=wlan0
bridge=br0
auth_algs=3
channel=7
driver=nl80211
hw_mode=g
logger_stdout=-1
logger_stdout_level=2
max_num_sta=5
rsn_pairwise=CCMP
wpa=2
wpa_key_mgmt=WPA-PSK
wpa_pairwise=TKIP CCMP
Note: Refer to the kernel's hostapd documentation for more wireless configuration options.


The access point can be started and tested by hand:

hostapd /etc/hostapd/hostapd.conf


Systemd auto-start with bridge to eth0

It is possible to configure the auto-start of 'hostapd' through systemd. The configuration outlined below will set up a bridge with "eth0", meaning the Wi-Fi connection is directly connected to the ethernet network. The ethernet network is required to have a DHCP server present and active on it to assign Wi-Fi clients an IP address. This setup will allow Wi-Fi clients access to the same network as the ethernet port, and the bridge interface will allow the platform itself to access the network.


Set up hostapd

First, create the file "/etc/systemd/system/hostapd_user.service" with the following contents:

[Unit]
Description=Hostapd IEEE 802.11 AP
Wants=network.target
Before=network.target
Before=network.service
After=sys-subsystem-net-devices-wlan0.device
After=sys-subsystem-net-devices-br0.device
BindsTo=sys-subsystem-net-devices-wlan0.device
BindsTo=sys-subsystem-net-devices-br0.device
 
[Service]
Type=forking
PIDFile=/run/hostapd.pid
ExecStart=/usr/sbin/hostapd /etc/hostapd/hostapd.conf -P /run/hostapd.pid -B
 
[Install]
WantedBy=multi-user.target

Then enable this in systemd:

systemctl enable hostapd_user.service
systemctl enable systemd-networkd


Set up bridging

Create the following files with the listed contents.


"/etc/systemd/network/br0.netdev"

[NetDev]
Name=br0
Kind=bridge


"/etc/systemd/network/br0.network"

[Match]
Name=br0
 
[Network]
DHCP=yes


"/etc/systemd/network/bridge.network"

[Match]
Name=eth0
 
[Network]
Bridge=br0

4.1.3 Debian Application Development

4.1.3.1 Debian Stretch Cross Compiling

Debian Stretch provides cross compilers from its distribution. An install on a workstation can build for the same release on other architectures. A Linux desktop or laptop PC, virtual machine, or chroot will need to be used for this. Debian Stretch for a workstation can be downloaded from here.

From a Debian workstation (not the target), run these commands to set up the cross compiler:

# Run "lsb_release -a" and verify Debian 9.X is returned.  These instructions are not
# expected to work on any other version or distribution.
su root
# Not needed for the immediate apt-get install, but used
# so we can install package:armhf for cross compiling
dpkg --add-architecture armhf
apt-get update
apt-get install curl build-essential crossbuild-essential-armhf -y

This will install a toolchain that can be used with the prefix "arm-linux-gnueabihf-". The standard GCC tools will start with that name, eg "arm-linux-gnueabihf-gcc".

The toolchain can now compile a simple hello world application. Create hello-world.c on the Debian workstation:

#include <stdio.h>
int main(){
    printf("Hello World\n");
}

To compile this:

arm-linux-gnueabihf-gcc hello-world.c -o hello-world
file hello-world

This will return that the binary created is for ARM. Copy this to the target platform to run it there.

Debian Stretch supports multiarch which can install packages designed for other architectures. On workstations this is how 32-bit and 64-bit support is provided. This can also be used to install armhf packages on an x86 based workstation.

This cross compile environment can link to a shared library from the Debian root. The package would be installed in Debian on the workstation to provide headers and libraries. This is included in most "-dev" packages. When run on the arm target it will also need a copy of the library installed, but it does not need the -dev package.

apt-get install libcurl4-openssl-dev:armhf
 
# Download the simple.c example from curl:
wget https://raw.githubusercontent.com/bagder/curl/master/docs/examples/simple.c
# After installing the supporting library, curl will link as compiling on the unit.
arm-linux-gnueabihf-gcc simple.c -o simple -lcurl

Copy the binary to the target platform and run on the target. This can be accomplished with network protocols like NFS, SCP, FTP, etc.

If any created binaries do not rely on hardware support like GPIO or CAN, they can be run using 'qemu'.

# using the hello world example from before:
./hello-world
# Returns Exec format error
apt-get install qemu-user-static
./hello-world


4.1.4 Debian Installing New Software

Debian provides the apt-get system which allows management of pre-built applications. The apt tools require a network connection to the internet in order to automatically download and install new software. The update command will download a list of the current versions of pre-built packages.

apt-get update

A common example is installing Java runtime support for a system. Find the package name first with search, and then install it.

root@ts:~# apt-cache search openjdk
default-jdk - Standard Java or Java compatible Development Kit
default-jdk-doc - Standard Java or Java compatible Development Kit (documentation)
default-jdk-headless - Standard Java or Java compatible Development Kit (headless)
default-jre - Standard Java or Java compatible Runtime
default-jre-headless - Standard Java or Java compatible Runtime (headless)
jtreg - Regression Test Harness for the OpenJDK platform
libreoffice - office productivity suite (metapackage)
openjdk-8-dbg - Java runtime based on OpenJDK (debugging symbols)
openjdk-8-demo - Java runtime based on OpenJDK (demos and examples)
openjdk-8-doc - OpenJDK Development Kit (JDK) documentation
openjdk-8-jdk - OpenJDK Development Kit (JDK)
openjdk-8-jdk-headless - OpenJDK Development Kit (JDK) (headless)
openjdk-8-jre - OpenJDK Java runtime, using Hotspot JIT
openjdk-8-jre-headless - OpenJDK Java runtime, using Hotspot JIT (headless)
openjdk-8-jre-zero - Alternative JVM for OpenJDK, using Zero/Shark
openjdk-8-source - OpenJDK Development Kit (JDK) source files
uwsgi-app-integration-plugins - plugins for integration of uWSGI and application
uwsgi-plugin-jvm-openjdk-8 - Java plugin for uWSGI (OpenJDK 8)
uwsgi-plugin-jwsgi-openjdk-8 - JWSGI plugin for uWSGI (OpenJDK 8)
uwsgi-plugin-ring-openjdk-8 - Closure/Ring plugin for uWSGI (OpenJDK 8)
uwsgi-plugin-servlet-openjdk-8 - JWSGI plugin for uWSGI (OpenJDK 8)
java-package - Utility for creating Java Debian packages

In this case, the wanted package will likely be the "openjdk-8-jre" package. Names of packages can be found on Debian's wiki pages or the packages site.

With the package name apt-get install can be used to install the prebuilt packages.

apt-get install openjdk-8-jre
# More than one package can be installed at a time.
apt-get install openjdk-8-jre nano vim mplayer

For more information on using apt-get refer to Debian's documentation here.


4.1.5 Debian Setting up SSH

To install the SSH server, install the package with apt-get:

apt-get install openssh-server


Debian Stretch by default disallows logins directly from the user "root". Additionally, SSH will not allow remote connections without a password or valid SSH key pair. This means in order to SSH to the device, a user account must first be created, and a password set:

useradd --create-home --shell /bin/bash newuser
passwd newuser


After this setup it is now possible to connect to the device as user "newuser" from a remote PC supporting SSH. On Linux/OS X this is the "ssh" command, or from Windows using a client such as PuTTY.


4.1.6 Debian Starting Automatically

A systemd service can be created to start up headless applications. Create a file in /etc/systemd/system/yourapp.service

[Unit]
Description=Run an application on startup
 
[Service]
Type=simple
ExecStart=/usr/local/bin/your_app_or_script
 
[Install]
WantedBy=multi-user.target

If networking is a dependency add "After=network.target" in the Unit section. Once you have this file in place add it to startup with:

# Start the app on startup, but will not start it now
systemctl enable yourapp.service
 
# Start the app now, but doesn't change auto startup
systemctl start yourapp.service
Note: See the systemd documentation for in depth documentation on services.


5 Backup / Restore

5.1 Creating A Production Image

It is usually desired to create a golden image to use for unit production after development is complete. This process can vary greatly from application to application but there are a few steps that are going to be most often wanted. These include cleaning up temporary files, removing files that should be unique and re-generated on the first boot (SSH keys, machine-id files, etc.), setting up the hostname, and so on. We have created a script that will automate most of this process and provides hooks for additionally scripts to be called as well. The script is simply passed the device node of the development disk or an existing .dd file. From this, it will create a new .dd file based on the partition scheme with all modifications made to the new image. The image source is left completely untouched and is only read. The script also assumes that the last partition on the disk is the bootable linux partition. If this is not the case or there are multiple partitions that are used in the end application, the script will need to be modified in order to accommodate this fact.

Note: The script uses output from various commands. The output format of linux utilities can vary greatly from distribution to distribution, or even within versions of the distribution. It is strongly recommended to verify the final processed image contains everything necessary for the application and that all processes completed without issue.


The simplest use of the script is:

./prep_customer_image /dev/sdX <output base name>

Note that "/dev/sdX" will need to be changed accordingly. Be sure to pass the whole disk and not just a partition.

The "<output base name>" is used as the base for all files output. For example, if "TechnologicSystems-latest" was used, then the compressed tarball output would be named "TechnologicSystems-latest.tar.bz2" (or it may end with ".tar.xz" depending on the compression used by the script). If no base name is provided, then the current date is used.

Additionally, there are two hooks available in the 'prep_customer_image' script, "prep" and "post". The top of the file has two variables, `PREP_SCRIPTS=""` and `POST_SCRIPTS=""`. Adding in a space separated list of script names to those variables will cause them to be called in order. For example, setting `PREP_SCRIPTS="add_application change_hostname"` will cause the 'prep_customer_image' script to run through its initial steps, then call './add_application', then call './change_hostname', and then will continue with the rest of the script steps.

Every script for "prep" and "post" is called with a single argument, the name of the image file. This specifically will be "<output base name>.dd". At the time of calling the prep scripts, the folder "./mount_point/" will have the last partition of the image file mounted as read/write. It is not wise to modify the image file directly since it is already mounted. All of the post scripts are called after the last partition of the image file is unmounted. This can be useful for creating additional file outputs, extracting specific partition images, etc., from the image itself. We have used these hooks in the past to remove special files and create additional images for our DoubleStore based devices.

It is also possible to run this script directly on the device when booted. This can be used to take an image of eMMC for example, when booted from the SD card. We always recommend doing initial development on SD, creating an image from that on a host PC, and then transferring it to the eMMC. This process makes development and image creation faster. If using the 'prep_customer_image' script from a booted device, be sure there is enough free space as the script creates a disk image of the target disk and then copies that in to a tarball, compressing everything as the final step.

The "prep_customer_image" script can be found in the TS-4100 utilities github.


5.2 microSD Card

MicroSD8GB.png Click to download the latest tarball.

These instructions assume an SD card with one partition. Most SD cards ship this way by default, but if there are modified partitions, a utility such as 'gparted' or 'fdisk' may be needed to remove the existing partition table and recreate it with a single partition. Note that the partition table must be "MBR" or "msdos", the "GPT" partition table format is not supported by U-Boot.

Plug the SD card into a USB reader (or native port if the host PC offers one) and connect it to a Linux workstation PC. Newer distributions include a utility called 'lsblk' which lists all block devices like a USB SD card adapter:

lsblk
 NAME   MAJ:MIN RM   SIZE RO TYPE MOUNTPOINT
 sdY      8:0    0   400G  0 disk 
 ├─sdY1   8:1    0   398G  0 part /
 ├─sdY2   8:2    0     1K  0 part 
 └─sdY5   8:5    0     2G  0 part [SWAP]
 sr0     11:0    1  1024M  0 rom  
 sdX      8:32   1   3.9G  0 disk 
 ├─sdX1   8:33   1   7.9M  0 part 
 ├─sdX2   8:34   1     2M  0 part 
 ├─sdX3   8:35   1     2M  0 part 
 └─sdX4   8:36   1   3.8G  0 part  

In this case the SD card is 4GB, so sdX is the target device. Note that "sdX" is not the real device name, it could be sda, sdb, mmcblk0, etc., so be sure to match up the real device name with the SD card. Technologic Systems is not responsible for any damages cause by using the improper device node for imaging an SD card.

Alternatively, after plugging in the device after Linux has booted, the command 'dmesg' can be used to print out the kernel log. When a new device is added to the system, information about it will be appended to the kernel logs. For example:

dmesg | tail -n 100
 scsi 54:0:0:0: Direct-Access     Generic  Storage Device   0.00 PQ: 0 ANSI: 2
 sd 54:0:0:0: Attached scsi generic sg2 type 0
 sd 54:0:0:0: [sdX] 3862528 512-byte logical blocks: (3.97 GB/3.84 GiB)

In this case, sdX is shown as a 3.97GB card. Note that "sdX" is not the real device name, it could be sda, sdb, mmcblk0, etc., so be sure to match up the real device name with the SD card. Technologic Systems is not responsible for any damages cause by using the improper device node for imaging an SD card.

Running these commands will write the SD card to our default latest image.

# Verify nothing else has the disk mounted with 'mount'
# If partitions are mounted automatically, they can be unmounted with
sudo umount /dev/sdX1
 
sudo mkfs.ext3 /dev/sdX1
sudo mkdir /mnt/sd
sudo mount /dev/sdX1 /mnt/sd/
wget http://ftp.embeddedarm.com/ftp/ts-socket-macrocontrollers/ts-4100-linux/distributions/debian/ts4100-armhf-stretch-latest.tar.xz
 
sudo tar -xJf ts4100-armhf-stretch-latest.tar.xz -C /mnt/sd
sudo umount /mnt/sd
sync
Note: The ext4 filesystem can be used instead of ext3, but it may require additional options. U-Boot does not support the 64bit addressing added as the default behavior in recent revisions of mkfs.ext4. If using e2fsprogs 1.43 or newer, the options "-O ^64bit,^metadata_csum" must be used with ext4 for proper compatibility. Older versions of e2fsprogs do not need these options passed nor are they needed for ext3.


After the image is written, the files can all be verified on disk against the original files created in the tarball. Reinsert the disk to verify any block cache is gone, then run the following:

mount /dev/sdX1 /mnt/sd
cd /mnt/sd/
sudo md5sum --quiet -c md5sums.txt
umount /mnt/sd
sync

The 'md5sum' command will report any differences between files and their checksums. Any differences are an indication of failure to write data or a damaged disk.


5.3 eMMC

5.3.1 Booted from SD

These instructions assume the TS-4100 is booted from SD card all the way to Linux. They also assume that the eMMC is unmodified, with a single partition. If the partition table has been modified, a utility such as 'gparted' or 'fdisk' may be needed to remove the existing partition table and recreate it with a single partition. Note that the partition table must be "MBR" or "msdos", the "GPT" partition table format is not supported by U-Boot.

# Verify nothing else has the partition mounted
umount /dev/mmcblk1p1
 
mkfs.ext3 /dev/mmcblk1p1
mount /dev/mmcblk1p1 /mnt/emmc
wget http://ftp.embeddedarm.com/ftp/ts-socket-macrocontrollers/ts-4100-linux/distributions/debian/ts4100-armhf-stretch-latest.tar.xz
tar -xf ts4100-armhf-stretch-latest.tar.xz -C /mnt/emmc
umount /mnt/emmc
sync
Note: The ext4 filesystem can be used instead of ext3, but it may require additional options. U-Boot does not support the 64bit addressing added as the default behavior in recent revisions of mkfs.ext4. If using e2fsprogs 1.43 or newer, the options "-O ^64bit,^metadata_csum" must be used with ext4 for proper compatibility. Older versions of e2fsprogs do not need these options passed nor are they needed for ext3.

Once written, the files on disk can be verified to ensure they are the same as the source files in the archive. To do so, run the following commands:

mount /dev/mmcblk1p1 /mnt/emmc
cd /mnt/emmc/
md5sum --quiet -c md5sums.txt
cd -
umount /mnt/emmc
sync

The 'md5sum' command will report any differences between files and their checksums. Any differences are an indication of failure to write data or a damaged disk.

6 Compile the Kernel

Compiling the kernel requires an armhf toolchain. We recommend development under Debian Stretch which includes an armhf compiler in the repositories. See the Debian Stretch cross compilation section for instructions on installing a proper cross compiler.

git clone git clone https://github.com/embeddedarm/linux-4.9.y
cd linux-4.9.y
 
# These next commands set up some necessary environment variables
export ARCH=arm
export CROSS_COMPILE=arm-linux-gnueabihf-
export LOADADDR=0x80800000
 
# This sets up the default configuration that we ship with
make tsimx6ul_defconfig
 
## Make any changes in "make menuconfig" or driver modifications, then compile
make && make zImage && make modules

To install the kernel and modules to an SD card, attach it to the PC and assuming the the SD card shows up as "/dev/sdc", run the following:

export DEV=/dev/sdc1
sudo mount "$DEV" /mnt/sd
sudo cp arch/arm/boot/zImage  /mnt/sd/boot/zImage
sudo cp arch/arm/boot/dts/imx6ul*ts*.dtb /mnt/sd/boot/
INSTALL_MOD_PATH="/mnt/sd" sudo -E make modules_install 
sudo -E make headers_install INSTALL_HDR_PATH="/mnt/sd/usr"
sudo umount /mnt/sd/
sync

7 Production Mechanism

Note: This section is incomplete at this time

The TS-4100's U-Boot has the ability to locate and run a U-Boot script file named "/tsinit.scr" on the root of a USB drive. This process occurs when attempting to boot to the U-Boot shell or when booting to USB. If this script exists, U-Boot will load and run it automatically. This is intended for the initial production of units and allows mass programming various media from a USB mass storage device. See the U-Boot USB booting section for information on how this process starts.

The USB blasting image can be downloaded here. This includes a basic linux kernel and a small initramfs that will mount the USB drive at /mnt/usb/ and execute /mnt/usb/blast.sh.

The blast image and scripts require a minimum of 50 MB; this plus any disk images or tarballs used dictate the minimum disk size required. The USB drive must have at least 1 partition, with the first partition being formatted ext2/3 or fat32/vfat.

Note: The ext4 filesystem can be used instead of ext3, but it may require additional options. U-Boot does not support the 64bit addressing added as the default behavior in recent revisions of mkfs.ext4. If using e2fsprogs 1.43 or newer, the options "-O ^64bit,^metadata_csum" must be used with ext4 for proper compatibility. Older versions of e2fsprogs do not need these options passed nor are they needed for ext3.
# This assumes USB drive is /dev/sdc:
sudo mkfs.ext3 /dev/sdc1
sudo mkdir /mnt/usb/
sudo mount /dev/sdc1 /mnt/usb/
sudo tar --numeric-owner -xf /path/to/tsimx6ul_usb_blaster-latest.tar.bz2 -C /mnt/usb/

At this point, disk images or tarballs would be copied to the /mnt/usb/ folder and named as noted below. The latest disk images we provide can be downloaded from our FTP site, see the backup and restore section for links to these files. Note that the script expects images and tarballs to have specific names. When using an ext* filesystem, symlinks can be used.

The formatted USB drive boots into a small buildroot initramfs environment with filesystem and partitioning tools installed. This can be used to format SD, eMMC, or other disks. The buildroot starts up and calls /blast.sh on the USB device. By default this script is set up to look for a number of of specific files on the USB disk and write to media on the host device. Upon completion of the script the green or red LEDs will blink to visually indicate a pass or fail of the script. This script can be used without modification to write images from USB with these filenames:

SD Card sdimage.tar.bz2 Tar of the filesystem. This will repartition the SD card to 1 ext4 partition and extract this tar to the filesystem. If present, a /md5sums.txt will be checked and every file can be verified on the filesystem. This md5sums file is optional and can be omitted, but it must not be blank if present.
sdimage.dd.bz2 Disk image of the card. This will be written to mmcblk0 directly. If present a sdimage.dd.md5 will cause the written data on the SD card to be read back and verified against this checksum.
eMMC emmcimage.tar.bz2 Tar of the filesystem. This will repartition the eMMC to 1 ext4 partition and extract this tar to the filesystem. If present, a /md5sums.txt will be checked and every file can be verified on the filesystem. This md5sums file is optional and can be omitted, but it must not be blank if present.
emmcimage.dd.bz2 Disk image of the card. This will be written to mmcblk1 directly. If present a emmcimage.dd.md5 will cause the written data on the eMMC to be read back and verified against this checksum.

Most users should be able to use the above script without modification. Our buildroot sources are available from our github repo. To build the whole setup and create a USB drive, the following commands can be used. This will wipe any data on the specified partition and replace it with an ext2 formatted filesystem. This filesystem will have all of the necessary files written to it to create a bootable USB drive. Note that this must be the first partition of the disk.

# Assuming /dev/sdc1 is your usb drive's first partition
make tsimx6ul_defconfig && make && sudo ./make_usb_prog.sh /dev/sdc1 tsimx6ul


8 TS-8820-4100 MUXBUS Interface

The TS-4100 uses the MUXBUS protocol to read and write the TS-8820 FPGA registers. The TS-4100 FPGA does not natively support the MUXBUS protocol in any way, however all of the relevant electrical connections are accessible to the TS-4100 FPGA as GPIO pins. In order to facilitate the communication, the TS-4100 ZPU is loaded with a program that is designed to accept data from the CPU and perform MUXBUS bus cycles by directly manipulating the FPGA GPIO pins.


8.1 Loading the MUXBUS Application

The utility 'tszpuctl' is used to compile applications, load them in to the ZPU, perform ZPU reset, dump ZPU RAM, and get basic information about the ZPU itself. The sources for 'tszpuctl' as well as the "zpu_muxbus" application are available from the ts4100-utils github repository.

The ZPU can be loaded with the MUXBUS application with the following commands:

tszpuctl -l /usr/local/bin/zpu/zpu_muxbus.bin

Note that the ZPU must be re-loaded with this application each time the unit is booted up. The program is loaded directly in to ZPU RAM and executed from there. The sources for zpu_muxbus.bin can be found in the TS-4100 utilities repository.

8.2 Using the ts8820ctl Application

With the ZPU loaded, it is now ready to accept commands to read and write TS-8820 FPGA registers. Many of the TS-8820 features listed below show an example of using "ts8820ctl" to interact with I/O or other peripherals. The 'ts8820ctl' application is included in the stock TS-4100 image and requires the ZPU be loaded with the "zpu_muxbus" application first. If the ZPU is not loaded, 'ts8820ctl' will return with an error indicating that it was unable to communicate with the ZPU.


8.3 Custom Applications

The 'ts8820ctl' application is meant as a demo application. While it can be used on its own it may be necessary to integrate its features in to a larger application. This is the reason that 'ts8820ctl' is broken down in to multiple layers.

The top level "src/ts8820ctl.c" file in the ts4100-utils github repository is the command line interface. From there it makes a number of calls to functions provided by "src/ts8820.c". These functions do the heavy lifting of formatting data and making calls to the ZPU via a custom FIFO interface. The functions in "ts8820.c" can be called from other applications to directly manipulate the TS-8820 peripherals.


9 Features

9.1 ADC Channels

Note: Support for this feature requires the use of the TS-4100 ZPU to handle MUXBUS transactions to the TS-8820. See this section for setup information.


The TS-8820 offers 16 channels of single ended bi-polar ADC inputs. These ADC inputs are provided by two separate 8 channel ADC devices. Each ADC controller supports a selectable voltage (via GPIO from the CoM, see below) ranges of -5 V to +5 V as well as -10 V to +10 V. This means that each set of 8 channels can be set to different ranges. Each set of 8 channels are sampled simultaneously inside the ADC device.

All 16 ADC inputs are located on the P3, P4, and P5 terminal blocks. While each ADC has a pair of inputs, they are single ended ADC channels; all negative input terminals connect to the TS-8820 common ground.

Additionally, the ADC devices support a number of oversampling options, also controlled via GPIO from the CoM. Enabling oversampling has the effect of adding a digital filter function after the ADC. Increasing the oversampling ratio will decrease the effective sampling rate of the ADC but will increase the signal to noise ratio of each channel. The oversampling rate is shared between both ADC devices, that is, the rate can not be independently set per-device.

DIO numbers are expressed in <chip>_<pin> notation for use with TS-4100 GPIO.

Setting the ADC voltage range:

ADC chan. 1 - 8
DIO Val Range
3_22 1 -10 V to +10 V
3_22 0 -5 V to +5 V
ADC chan. 9 - 16
DIO Val Range
3_23 1 -10 V to +10 V
3_23 0 -5 V to +5 V

Setting the oversampling rate:

3_26 3_25 3_24 OS Rate
0 0 0 N/A
0 0 1 2
0 1 0 4
0 1 1 8
1 0 0 16
1 0 1 32
1 1 0 64
1 1 1 Invalid
Note: CoM GPIO pins will usually start as inputs with pull up resistors. Therefore the default range will likely be -10 V to +10 V with an invalid oversampling rate. It is advised to set up these pins before acquiring ADC samples.

9.1.1 Current Loops (4-20 mA measurement)

All 16 ADC channels independently support 4-20 mA current loop measurements. This is achieved by setting a pin jumper for the respective channel on the current loop enable pin header. Setting a jumper will electrically enable a 200 Ω 0.5% resistor from the ADC channel to ground allowing for a constant current measurement.

9.1.2 Thermistor

The TS-8820 supports up to 8 thermistors on channels 1 though 8. Support for a thermistor is enabled via software, the ADC pullup bit of TS-8820 FPGA register 0x2. Setting bit 8 enables a pull up on ADC channels 1 and 2, setting bit 9 enables a pull up on ADC channels 3 and 4, and setting bit 10 enables a pull up on channels 5 through 8. When enabled, each channel will get a separate 6.04 kΩ resistor to +12.5 V allowing the use of a thermistor probe.

9.1.3 ADC Usage

The 'ts8820ctl' application can be used to quickly sample the ADCs. This will send simultaneous sampling commands to each of the two ADC devices which will then sample all 16 channels in total the amount of times specified. See the "ts8820ctl.c" and "ts8820.c" files for examples on how this operation takes place.

For example, to sample all of the channels 5 times, with a -10 to +10 V range, and an oversampling rate of 64x, the following command would be used:

ts8820ctl --sample=5 --range 1 --os 6
 
Collected 80 samples total.
 
Ch 1 Ch 2 Ch 3 Ch 4 Ch 5 Ch 6 Ch 7 Ch 8 Ch 9 Ch10 Ch11 Ch12 Ch13 Ch14 Ch15 Ch16 
---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- 
-7626 2195 2193 2199 2192 2195 2195 2192 2189 2189 2193 2190 2189 2192 2191 2191 
-7626 2194 2192 2198 2191 2194 2194 2191 2188 2189 2192 2189 2188 2191 2189 2190 
-7626 2193 2191 2197 2190 2193 2193 2190 2187 2188 2191 2188 2186 2190 2189 2189 
-7626 2189 2188 2193 2186 2189 2190 2186 2183 2184 2187 2184 2183 2186 2185 2185 
-7626 2189 2187 2192 2186 2188 2189 2186 2183 2183 2187 2184 2182 2185 2184 2185

Above, channel 1 has a -7.62 V voltage source attached to it, all other channels are left unconnected. It is recommended to always specify range and oversampling rate when running an ADC acquisition cycle.

9.2 Baseboard ID

All of our off the shelf baseboards contain a hard-wired 8-input multiplexer to indicate the baseboard model. This is not required to implement in custom baseboards, but it can be useful to identify the board model in software. The baseboard model is determined in the bootloader and the proper device tree is selected for the respective baseboard. For example, the TS-8551-4100 would use the "imx6ul-ts4100-16.dtb" device tree file. In U-Boot the device tree IDs are specified in hex, so 0x16 (U-Boot defaults to using base 16 for number representations) will match baseboard ID 22. If a board does not have a specific device tree, it will fall back to the default device tree which is "imx6ul-ts4100.dtb".

4 DIO pins are used to obtain the baseboard model ID. The red LED (CN2_06), green LED (CN2_08), BUS_DIR (CN1_98), and BD_ID_DATA (CN1_83) are used for this purpose. All of these IO pins can be used normally outside of acquiring the ID number.


The 6 least significant input pins (Y0 - Y5) are used to define the baseboard model. The upper two inputs (Y6 and Y7) define board revision.

For custom baseboards we have reserved the address 42 which will never be used by our standard products.

TS-8160 baseboard ID resulting in ID 6, rev 0.


TS-Baseboard IDs
ID Baseboard
0 TS-8200
1 Reserved, do not use
2 TS-TPC-8390
4 TS-8500
5 TS-8400
6 TS-8160
7 TS-8100
8 TS-8820-BOX
9 TS-8150
10 TS-TPC-8900
11 TS-8290
13 TS-8700
14 TS-8280
15 TS-8380
16 TS-AN20
17 TS-TPC-8920
19 TS-8550
20 TS-TPC-8950
22 TS-8551
42 Reserved for customer use, never used by us
255 TS-8200


9.3 Bluetooth

The Wi-Fi option for the unit also includes a bluetooth 4.0 LE module. Both Wi-Fi and Bluetooth can be active at the same time. However, in order for bluetooth to function the Wi-Fi device must first be brought up to load the necessary firmware. After the Wi-Fi is active, the Bluetooth module can be activated with the following commands:

# Ensure that the Wi-Fi device is active
ifconfig wlan0 up 
 
# Enable Bluetooth, and load the driver firmware
echo BT_POWER_UP > /dev/wilc_bt
echo BT_DOWNLOAD_FW > /dev/wilc_bt
echo BT_FW_CHIP_WAKEUP > /dev/wilc_bt
 
hciattach /dev/ttymxc2 any 115200 noflow
hciconfig hci0 up
hcitool cmd 0x3F 0x0053 00 10 0E 00 01
stty -F /dev/ttymxc2 921600 crtscts

The Bluetooth module is now set up, and is running at 921600 baud with full flow control. At this point, the device is fully set up and can be controlled with various components of bluez-tools. For example, to do a scan of nearby devices:

hcitool lescan

This will return a list of devices such as:

3C:A3:08:XX:XX:XX Device_Name

Bluez has support for many different profiles for HID, A2DP, and many more. Refer to the Bluez documentation for more information.

Please note that the Bluetooth module requires the modem control lines CTS and RTS as flow control.

The module supports some other commands as well:

# Allow the BT chip to enter sleep mode
echo BT_FW_CHIP_ALLOW_SLEEP > /dev/wilc_bt
 
# Power down the BT radio when not in use
echo BT_POWER_DOWN > /dev/wilc_bt


9.4 CAN

The TS-8820-4100 has a single isolated CAN port. This is the "can0" device.

The i.MX6UL CPU has two FlexCAN ports that use the linux SocketCAN implementation. The ports can be set up and used with the following commands:

ip link set can0 up type can bitrate 1000000
ip link set can1 up type can bitrate 1000000

At this point the ports can be used with standard SocketCAN libraries. The default Debian distribution ships with "can-utils" installed by default in order to test the ports or as a simple packet send/receive tool. The 'candump' utility can be used to dump all data packets from the CAN network, while the 'cansend' utility will send out packets.

# To print all incoming CAN packets
candump can0
 
# To send out a CAN packet
cansend can1 7Df#03010c

The above example packet is designed to work with the Ozen Elektronik myOByDic 1610 ECU simulator to read the RPM speed. In this case, the ECU simulator would return data from candump with:

 <0x7e8> [8] 04 41 0c 60 40 00 00 00 
 <0x7e9> [8] 04 41 0c 60 40 00 00 00 

In the output above, columns 6 and 7 are the current RPM value. This shows a simple way to prove out the communication before moving to another language.

The following example sends the same packet and parses the same response in C:

#include <stdio.h>
#include <pthread.h>
#include <net/if.h>
#include <string.h>
#include <unistd.h>
#include <net/if.h>
#include <sys/ioctl.h>
#include <assert.h>
#include <linux/can.h>
#include <linux/can/raw.h>
 
int main(void)
{
	int s;
	int nbytes;
	struct sockaddr_can addr;
	struct can_frame frame;
	struct ifreq ifr;
	struct iovec iov;
	struct msghdr msg;
	char ctrlmsg[CMSG_SPACE(sizeof(struct timeval)) + CMSG_SPACE(sizeof(__u32))];
	char *ifname = "can0";
 
	if((s = socket(PF_CAN, SOCK_RAW, CAN_RAW)) < 0) {
		perror("Error while opening socket");
		return -1;
	}
 
	strcpy(ifr.ifr_name, ifname);
	ioctl(s, SIOCGIFINDEX, &ifr);
	addr.can_family  = AF_CAN;
	addr.can_ifindex = ifr.ifr_ifindex;
 
	if(bind(s, (struct sockaddr *)&addr, sizeof(addr)) < 0) {
		perror("socket");
		return -2;
	}
 
 	/* For the ozen myOByDic 1610 this requests the RPM guage */
	frame.can_id  = 0x7df;
	frame.can_dlc = 3;
	frame.data[0] = 3;
	frame.data[1] = 1;
	frame.data[2] = 0x0c;
 
	nbytes = write(s, &frame, sizeof(struct can_frame));
	if(nbytes < 0) {
		perror("write");
		return -3;
	}
 
	iov.iov_base = &frame;
	msg.msg_name = &addr;
	msg.msg_iov = &iov;
	msg.msg_iovlen = 1;
	msg.msg_control = &ctrlmsg;
	iov.iov_len = sizeof(frame);
	msg.msg_namelen = sizeof(struct sockaddr_can);
	msg.msg_controllen = sizeof(ctrlmsg);  
	msg.msg_flags = 0;
 
	do {
		nbytes = recvmsg(s, &msg, 0);
		if (nbytes < 0) {
			perror("read");
			return -4;
		}
 
		if (nbytes < (int)sizeof(struct can_frame)) {
			fprintf(stderr, "read: incomplete CAN frame\n");
		}
	} while(nbytes == 0);
 
	if(frame.data[0] == 0x4)
		printf("RPM at %d of 255\n", frame.data[3]);
 
	return 0;
}

See the Kernel's CAN documentation here. Other languages have bindings to access CAN such as Python using C-types, Java using JNI.


9.5 CPU

This device uses the i.MX6UL CPU running at 528MHz or 696MHz using a Cortex-A7 core targeting low power consumption.

Refer to NXP's documentation for more detailed information on the CPU.


9.5.1 CPU Frequency Scaling

The i.MX6UL CPU has a number of power management features to scale the CPU speed. The maximum speed of the i.MX6UL is 696 MHz; other frequencies possible are 528 MHz, 396 MHz, and 198 MHz. By default, the "ondemand" frequency governor is used. This allows the CPU to run at its lowest speed and increase it when there is computation demand. Other governors are available, see the kernel documentation for a list of these governors and their operation.

The current CPU frequency as well as the governor used are modified by a set of files within the folder "/sys/bus/cpu/devices/cpu0/cpufreq". Some key files are outlined below:

 /sys/bus/cpu/devices/cpu0/cpufreq/cpuinfo_cur_freq - Lists the current frequency
 /sys/bus/cpu/devices/cpu0/cpufreq/scaling_governor - Lists/sets the current frequency governor
 /sys/bus/cpu/devices/cpu0/cpufreq/scaling_setspeed - When govenor is "userspace", set current frequency
 /sys/bus/cpu/devices/cpu0/cpufreq/scaling_available_frequencies - List all available frequencies
 /sys/bus/cpu/devices/cpu0/cpufreq/scaling_available_governors - List all available governors

In order to manually specify a frequency, the frequency governor must be set to userspace. For example, to force the lowest CPU frequency all the time:

echo "userspace" > /sys/bus/cpu/devices/cpu0/cpufreq/scaling_governor
echo "198000" > /sys/bus/cpu/devices/cpu0/cpufreq/scaling_setspeed

9.6 DAC Channels

Note: Support for this feature requires the use of the TS-4100 ZPU to handle MUXBUS transactions to the TS-8820. See this section for setup information.


The TS-8820 has 4 channels of 0 to +10 V DAC outputs. Each DAC channel has a positive and negative terminal connection. The negative side of the terminals are connected to the common ground of the TS-8820 and are non-isolated. The DAC terminals are on the P3 and P9 terminal blocks.

The DAC channels each have 12 bits of resolution that correspond to 0 to +10 V output. The upper bit (bit 15) of each register is a control bit that is used to synchronize the output of all 4 DAC channels. This means that all four registers can be updated without modifying the actual DAC output. Setting the control bit of any DAC channel register will case an update of the DAC output of all four channels. If the DAC register has not been modified, the update will still be sent but the actual output will remain the same. Reading this control bit will indicate if the synchronization is complete. Writing the DAC registers while the control bit is still asserted, indicating busy, will result in undefined behavior. The update process from setting the control bit to its completion takes approximately 3 microseconds.

When 0 is written to the control bit, the DAC values are updated internally in the FPGA but not transferred to the DAC. Thus any set of channels can be updated simultaneously by only writing a one on the final write.

The DAC channels can be controlled through 'ts8820ctl'. Note that the "--setdac" option to 'ts8820ctl' will always set the control bit of the selected register. See "ts8820ctl.c" and "ts8820.c" for an example of how this process works.

The following command would set DAC output 1 to 0.5 V:

ts8820ctl --setdac=1 --mvolts=500

9.7 Digital Inputs

Note: Support for this feature requires the use of the TS-4100 ZPU to handle MUXBUS transactions to the TS-8820. See this section for setup information.


The TS-8820 offers 14 digital input pins. There are 8 isolated inputs that are 30 V tolerant. The 6 non-isolated inputs are 40 V tolerant.

The inputs can be polled directly through the ts8820ctl application. See ts8820ctl.c and ts8820.c for examples of how this reads from the TS-8820 registers.

With the ts8820ctl application, all 14 inputs can be read with a single command. A 14-bit value is returned in hex in a format that can be parsed easily by scripting languages. For example, the following output indicates that IN1 and IN3 are active:

ts8820ctl --getdio
dio=0x5

When an input is activated its associated LED indicator is enabled to provide visual feedback.


9.7.1 Isolated Inputs

Digital inputs IN1 though IN8 are isolated, each having their own positive and negative terminal. In order to activate an input, a potential of at least 3 VDC and not more than 30 VDC must be generated across these terminals. Isolated input terminals are located on P1 and P7 terminal blocks.


9.7.2 Buffered Inputs

Digital inputs IN9 through IN14 are non-isolated, buffered, active low inputs. Each pin has a nominal threshold of 2.5 VDC, a 3.24 Kohm pull-up to 5 VDC, and are 40 VDC tolerant. Non-isolated inputs are located on the P2 terminal block.


9.7.3 Pulse Counter

Each of the 14 digital inputs has an associated 16-bit pulse counter. The counters are reset at power on, and continue counting through their entire 16 bit range before rolling over. There is no mechanism to clear the counters arbitrarily.

Each counter is incremented once per transition of the associated IN channel, on the asserted edge of the signal. IN1-IN8 counters increase when a positive voltage is applied while IN9-IN14 counters increment when the pin is grounded. The pulse counters do not increment when the signal is returning to its deasserted state.

Note: The counter logic does not include any debounce; care should be taken when using the pulse counter for a mechanical contact closure to ensure an accurate count.

The current count for any given channel can be acquired with:

ts8820ctl --counter <in>
 
ts8820ctl --counter 10
# Returns the output of
counter10=4

9.8 Digital Outputs

Note: Support for this feature requires the use of the TS-4100 ZPU to handle MUXBUS transactions to the TS-8820. See this section for setup information.


The TS-8820 offers 6 digital outputs. OUT1 through OUT4 are isolated and act as a solid state relay capable of switching up to 40 VDC at 1 A continuous draw. OUT5 and OUT6 are non-isolated, able to sink up to 1 A continuous current, and are 40 VDC tolerant.

The outputs can be controlled directly through the 'ts8820ctl' application. See "ts8820ctl.c" and "ts8820.c" for examples of how this writes to the TS-8820 registers.

With the 'ts8820ctl' application, all 6 outputs are manipulated in a single command. That is, a 6-bit value is passed as an argument, and that value is directly set to the outputs. For example, to set OUT5:

ts8820ctl --setdio=0x10

When an output is activated its associated LED indicator is enabled to provide visual feedback.


9.8.1 Isolated Outputs

Digital outputs OUT1 through OUT4 are isolated, each having their own positive and negative terminal. Each isolated output acts as a solid state relay allowing current to flow through the contacts only when it is activated. The isolated outputs are able to switch up to 40 VDC at 1 A continuous current draw. Isolated output terminals are made available on the P7 terminal block.


9.8.2 Non-Isolated Outputs

Digital outputs OUT5 and OUT6 are non-isolated, they rely on the main TS-8820 ground and only have a single contact. Each non-isolated output is a low side switch capable of sinking current when activated. The non-isolated outputs are capable of sinking 1 A continuous current with 40 V input voltage. Non-isolated input terminals appear on the P2 terminal block.


9.8.3 PWM

The TS-8820 has 6 PWM outputs. PWM channels 1 to 6 feed digital outputs 1 to 6 respectively when the PWM override bit is set for a given output.

For all 8 PWM channels, the PWM frequency is approximately (12207/(2^prescaler)) Hz, where the prescaler value is 3 bits wide. That is, a prescaler value of 0 through 7. The PWM duty cycle has 12 bits of resolution. If bit 12 of a PWM register is set, then the PWM output for that channel will be 100% high. Otherwise, the duty cycle setting is divided by 4096 to give the effective duty cycle.

To give OUT5 a ~3 kHZ 50% duty cycle PWM output using ts8820ctl, the following arguments would be used:

# -P sets the PWM frequency via a prescaler value to (12207/(2^VALUE))Hz.
# --mvolts= sets the PWM duty cycle percentage from a decimal scale of 0-10000
# --pwm= PWM channel to enable and modify
ts8820ctl --pwm=5 --mvolts=5000 -P 2

9.9 eMMC

Note: This section is incomplete at this time.

The i.MX6UL SD card controller supports the MMC specification, the TS-4100 includes a soldered down eMMC IC to provide on-board flash media.

Our default software image contains 3 partitions:

Device Contents
/dev/mmcblk1 eMMC block device
/dev/mmcblk1boot0 eMMC boot partition
/dev/mmcblk1boot1 eMMC boot partition
/dev/mmcblk1p1 Full Debian linux partition


This platform includes an eMMC device, a soldered down MMC flash device. Our off the shelf builds are 4 GB, but up to 64 GB are available for customized builds. The eMMC flash appears to Linux as an SD card at /dev/mmcblk1. Our default programming of the eMMC is the same as the SD card image for standard partitions, but includes additional boot partitions that are used by U-Boot and are not affected by the eMMC partition table.

The eMMC module has a similar concern by default to SD cards in that they should not be powered down during a write/erase cycle. However, this eMMC module includes support for setting a fuse for a "Write Reliability" mode, and a "psuedo SLC (pSLC)" mode. With both of these enabled all writes will be atomic to 512 B and each NAND cell will be treated as a single layer rather than a multi-layer cell. If a sector is being written during a power loss, a block is guaranteed to have either the old or new data. Even in cases where the wrong data is present on the next boot, fsck is often able to deal with the older data being present in a 512 B block. The downsides to setting these modes are that it will reduce the overall write speed and halve the available space on the eMMC to roughly 1.759 GB. Please note that even with these settings, Technologic Systems strongly recommends designing the end application to eliminate any situations where a power-loss event can occur while any disk is mounted as read/write. The TS-SILO option for the TS-4100 can help to eliminate the dangerous situation.

The "mmc-utils" package is used to enable these modes. The command is pre-installed on the latest image. Additionally we have created a script to safely enable the write reliability and pSLC modes. Since the U-Boot binary and environment reside on the eMMC, care must be taken to save the current state of the boot partitions, enable the modes, restore the boot partitions, and re-enable proper booting options. This script can be used in combination with the production mechanism scripting to complete these steps as part of an end application production process.


WARNING: Enabling these modes causes all data on the disk to become invalid and must be rewritten. Do not attempt to run the 'mmc' commands from the script individually, all steps in the script must occur as they are or the unit may be unable to boot. If there are any failures of the script, care must be taken to resolve any issues while the unit is still booted or it may fail to boot in the future.
WARNING: The script is only compatible with Rev. B or newer PCBs. Running the script on any previous PCB revision WILL result in the unit being unable to boot! There is no safe way to enable these modes on previous PCB revisions.
Note: Enabling these modes is a one-way operation, it is not possible to undo them once they are made. Because of this, setting these eMMC modes will invalidate Technologic Systems' return/replacement warranty on the unit. See the warranty section for more information on this.


The 'emmc_reliability' script can be found in the TS-4100 utilities github repository.

The script must be run when boot from any media other than eMMC, such as SD, NFS, or USB. No partition of the eMMC disk can be mounted when these commands are run. Doing so may result in corruption or inability for the unit to boot. Once the pSLC mode is enabled, all data on the disk will become invalid. This means the partition table will need to be re-created, the filesystems formatted, and all filesystem contents re-written to disk. This is why we recommend using this script in conjunction with the production mechanism scripting. The 'emmc_reliability' script can be run first, then the rest of the production script can create and format the partitions as well as write data to disk.

The script requires a single argument, the device node of the eMMC disk, and will output verbosely to stderr. Any specific errors will also be printed out on stderr.

Example usage:

./emmc_reliability /dev/mmcblk1

Upon successful run, the script will return 0. Any errors will return a positive code. See the script for detailed error code information.


9.10 Ethernet

This platform includes two ethernet devices using the dual in-CPU MACs and external PHYs. The MAC addresses are assigned from the Technologic System's OUI of 00:D0:69:xx:xx:xx, and the two MAC addresses assigned will always be sequential. These MAC addresses are burned into the CPU's fuses during production.

U-Boot supports only the ethernet port on CN1_01-11 (odd numbered pins). Once booted to Linux, this is "eth1", and CN2_16-24 (even numbered pins) provide "eth0".

The TS-8820 brings out a single 10/100 ethernet port. This is recognized as "eth1" in Linux. Due to the way that the ethernet PHYs are set up, both devices will always be present on the TS-4100, even though only one is available on the TS-8820-4100.


9.11 FPGA

9.11.1 FPGA Registers

The TS-4100 FPGA provides additional DIO (that are connected to a Crossbar MUX), some miscellaneous system peripherals, and the 32-bit ZPU microcontroller. The FPGA is a Lattice MachXO2.

See the GPIO section for information on accessing the FPGA DIO.

The FPGA registers are accessed via an I2C bus. The FPGA emulates an I2C EEPROM, allowing for a simple and standard communication protocol to the FPGA. The FPGA is available at I2C addresses 0x28-0x2F. Accessing individual registers requires a chip address write, a 16-bit register address write, then 8-bit data values. A read or write stream can occur; every every byte read or written the internal register pointer moves to the next sequential register. This allows for reading or writing multiple registers without having to re-issue the chip and register address sequence.

We provide a simple access mechanism to the FPGA using the 'tshwctl' utility. This utility can read or write arbitrary registers, return some information about the FPGA, as well as configure the Crossbar MUX. Sources for 'tshwctl' and other utilities specific to the TS-4100 can be found in the TS-4100 utilities github repository.

The register map is broken in to a few different sections:

Section Address Bits Description
GPIOn 0x0000-0x00FF 7:3 Reserved (Write 0)
2 GPIOn Input Data
1 GPIOn Output Data
0 GPIOn Output Enable
CROSSBARn 0x0080-0x00FF 7 CROSSBARn GPIO mode
6:0 CROSSBARn Value
BANKn 0x0100-0x010F 7:0 GPIOn Bank Input
0x0110-0x011F 7:0 GPIOn Bank Output Data
0x0120-0x012F 7:0 GPIOn Bank Output Enable
Misc 0x0130 7:0 Model Number MSB (0x41)
0x0131 7:0 Model Number LSB (0x00)
0x0132 7:0 FPGA Rev
0x0133-0x1FFF 7:0 Reserved
ZPU 0x1FFF-0x2FFF 7:0 ZPU RAM access

GPIOn

Registers 0x00-0x7F provide DIO control. The GPIO can be manipulated via the sysfs GPIO interface, information on this can be found in the GPIO section which is the recommended way to manipulate these pins. Each register in this section manipulates a different DIO pin. See the "FPGA I/O" table below for the register offset for this section. For example, to set "DIO_1" to a low output, the value 0x1 would be written to FPGA register 0x26 (the I/O number of "DIO_1").

Note: The sysfs GPIO interface is recommended because it guarantees a clean state transition. When setting a GPIOn register, modifying multiple bits simultaneously creates a race condition between the output and output enable bits. This may result in a short glitch on the pin as it transitions. The sysfs GPIO driver will only manipulate a single bit at a time resulting in a clean and guaranteed transition.


CROSSBARn

Registers 0x80-0xFF provide control for the Crossbar MUX. Like GPIOn above, each register represents a single DIO pin which are listed in the "FPGA I/O" table below. In order to change the MUX setting of any individual pin, its corresponding register is written to. For example, to set "UARTA_TXD" to output the data from "UART2_TXD", write the value of 0x5 (the I/O number of "UART2_TXD") to register (0x80+0x21) = 0xA1 (the I/O number of "UARTA_TXD" plus the CROSSBARn section starting register). The 'tshwctl' utility provides an easy abstraction for this process. See the Crossbar MUX section for more information on this process as well as a breakdown of Crossbar assignments.


BANKn

Registers 0x100-0x12F provide banked DIO access. The banked DIO allows for manipulating multiple pins simultaneously. Each bank register has 8 bits that represent 8 DIO pins. There are 48 bank registers total, 16 for GPIO input, 16 for GPIO output, and 16 for GPIO output enable. The bank and bit position of any given DIO listed in the "FPGA I/O" table below can be calculated by dividing the I/O number by 8 to get the bank number and then taking the modulus of that same calculation to get the bit position. The BANKn registers are not intended for normal use and exist to allow the ZPU to readily manipulate GPIO pins.


Misc

Registers 0x130-0x132 provide the model number and FPGA software revision. Registers 0x133-0x1FFF are reserved.


ZPU

Registers 0x2000-0x3FFF are RAM intended for use by the ZPU. Normally unused unless the ZPU is loaded and run, these registers can be used for volatile storage if wanted.


FPGA I/O
I/O Number Signal name Direction
0x01 SPARE_1 I/O
0x02 SPARE_2 I/O
0x03 SPARE_3 I/O
0x04 SPARE_4 I/O
0x05 UART2_TXD Input
0x06 UART2_CTS# Input
0x07 UART3_TXD Input
0x08 UART6_TXD Input
0x09 UART2_RXD Output
0x0A UART2_CTS# Output
0x0B UART3_RXD Output
0x0C UART6_RXD Output
0x0D WIFI_RXD Input
0x0E WIFI_RTS Input
0x0F WIFI_IRQ# Input
0x10 WIFI_TXD Output
0x11 WIFI_CTS Output
0x12 ZPU_BREAK Input
0x13 ZPU_RESET Output
0x14 EN_WIFI_PWR Output
0x15 WIFI_RESET# Output
0x16 EN_USB_HOST_5V Output
0x17 EN_LCD_3V3 Output
0x18 ETH_PHY_RESET# Output
0x19 OFF_BD_RESET# Output
0x1B GREEN_LED# Output
0x1C RED_LED# Output
0x1D UARTA_RXD I/O
0x1E UARTB_RXD I/O
0x1F UARTC_RXD I/O
0x20 UARTD_RXD I/O
0x21 UARTA_TXD I/O
0x22 UARTB_TXD I/O
0x23 UARTC_TXD I/O
0x24 UARTD_TXD I/O
0x25 DIO_0 I/O
0x26 DIO_1 I/O
0x27 DIO_2 I/O
0x28 DIO_3[1] I/O
0x29 DIO_4 I/O
0x2A DIO_5 I/O
0x2B DIO_6 I/O
0x2C DIO_7 I/O
0x2D DIO_8 I/O
0x2E DIO_9 I/O
0x31 DIO_12 I/O
0x32 DIO_13 I/O
0x33 DIO_14 I/O
0x34 DIO_15 I/O
0x35 DIO_16 I/O
0x36 DIO_17 I/O
0x37 DIO_18 I/O
0x38 DIO_19 I/O
0x39 DIO_20 I/O
0x3A DIO_21 I/O
0x3B DIO_22 I/O
0x3C DIO_23 I/O
0x3D DIO_24 I/O
0x3E DIO_25 I/O
0x3F DIO_26 I/O
0x40 DIO_27 I/O
0x41 DIO_28 I/O
0x42 DIO_29 I/O
0x43 DIO_30 I/O
0x44 DIO_31 I/O
0x45 DIO_32 I/O
0x46 DIO_33 I/O
0x47 DIO_34 I/O
0x48 DIO_35 I/O
0x49 DIO_36 I/O
0x4A DIO_37 I/O
0x4B DIO_38 I/O
0x4C DIO_39 I/O
0x4E DIO_41 I/O
0x4F DIO_42 I/O
0x50 DIO_43 I/O
0x51 DIO_44 I/O
0x52 DIO_45 I/O
0x53 DIO_46 I/O

DIO_3 Clock Override

DIO_3 has special modes that override the normal output and places a clock frequency on it. This is required for compatibility with certain TS-8XXX baseboards with MUXBUS functionality. See the ZPU section for more information on MUXBUS and TS-8XXX baseboards. The override consists of two registers, and only the Output Data bits in each register.

0x57:0x58 OD bit DIO_3 output
b00 DIO_3
b01 14.3 MHz clock
b10 12.5 MHz clock
b11 12.5 MHz clock
  1. For compatibility with various TS-8XXX baseboards, this pin has a special mode that allows it to output a clock. See I/O register 0x57 and 0x58.


9.11.2 Crossbar

The TS-4100 implements a limited crossbar MUX. This allows functional reassignment of pins to serve other purposes. For example, it is possible to connect different UARTs to different locations which can be used to repurpose otherwise unused UART ports. Additionally it can be used to connect a passthrough from a CPU GPIO to a pin that is only otherwise available from the FPGA.

Due to space constraints of the FPGA, there is a limitation of how pins can be assigned. The "Crossbar Assignable" column of the FPGA I/O table below lists the type of input assignment a pin will accept. The table also lists the default assignment of every pin.

  • All FPGA I/O pins listed in the table can have their input assigned as "GPIO". Note that even with an input assignment of "GPIO", some pins are still limited to being an input or output only GPIO. Pins assigned to an input of "GPIO" are controlled by the standard GPIO interface and numbered according to the FPGA GPIO table. Also note that if an invalid assignment is given to a pin, it will default back to the "GPIO" assignment.
  • An input of "GPIO" means that the logical input to the switching block comes directly from its associated pin. For example, the "UART2_TXD" signal is set to "GPIO" as its input. This means that the input to this switchable signal comes from the pin, which is connected to the CPU UART2_TXD signal. The "WIFI_TXD" signal has its input set to "UART2_TXD", with the "WIFI_TXD" physical pin connecting directly to the UART input of the Wi-Fi/BT module. This full path connects the CPU UART output, to the FPGA pin, to the "UART2_TXD" switching block, to the "WIFI_TXD" output pin, to the UART RX on the Wi-Fi/BT module.
  • No matter which FPGA I/O is assigned, the output signal must have its data direction set to out and the input signal must have its data direction set to in. Without these set properly the physical pins themselves will be unable to properly MUX signals.
  • The FPGA I/O pins compatible with an "Any" input assignment can be assigned any other pin in the table as an input.
  • The FPGA I/O pins compatible with "Input only" assignment can only be assigned "GPIO" as an input. They can, however, be used as inputs in to other pins that are able to accept it as an input. Attempting to set this pin to any other input assignment will result it in automatically reverting to "GPIO".
  • The FPGA I/O pins compatible with "UART only" assignments can only be assigned I/O numbers 0x01 through 0x08 inclusive. Attempting to assign any other input will automatically set the pin to "GPIO".


FPGA I/O
I/O Number Signal name Crossbar Assignable Default Input Assignment
0x01 SPARE_1 Any GPIO
0x02 SPARE_2 Any GPIO[1]
0x03 SPARE_3 Any GPIO[2]
0x04 SPARE_4 Any WIFI_IRQ#
0x05 UART2_TXD Input only GPIO
0x06 UART2_CTS# Input only GPIO
0x07 UART3_TXD Input only GPIO
0x08 UART6_TXD Input only GPIO
0x09 UART2_RXD Any WIFI_RXD
0x0A UART2_RTS# Any WIFI_RTS#
0x0B UART3_RXD Any UARTA_RXD
0x0C UART6_RXD Any UARTB_RXD
0x0D WIFI_RXD Input only GPIO
0x0E WIFI_RTS# Input only GPIO
0x0F WIFI_IRQ# Input only GPIO
0x10 WIFI_TXD UART only UART2_TXD
0x11 WIFI_CTS# UART only UART2_CTS#
0x12 ZPU_BREAK Input only GPIO
0x13 ZPU_RESET Input only GPIO
0x14 EN_WIFI_PWR Input only SPARE_2
0x15 WIFI_RESET# Input only SPARE_3
0x16 EN_USB_HOST_5V Input only GPIO
0x17 EN_LCD_3V3 Input only GPIO
0x18 ETH_PHY_RESET# Input only GPIO
0x19 OFF_BD_RESET# Input only GPIO
0x1B GREEN_LED# Input only GPIO
0x1C RED_LED# Input only GPIO
0x1D UARTA_RXD UART only GPIO
0x1E UARTB_RXD UART only GPIO
0x1F UARTC_RXD UART only GPIO
0x20 UARTD_RXD UART only GPIO
0x21 UARTA_TXD UART only UART3_TXD
0x22 UARTB_TXD UART only UART6_TXD
0x23 UARTC_TXD UART only GPIO
0x24 UARTD_TXD UART only GPIO
0x25 DIO_0 UART only GPIO
0x26 DIO_1 UART only GPIO
0x27 DIO_2 UART only GPIO
0x28 DIO_3 UART only GPIO
0x29 DIO_4 UART only GPIO
0x2A DIO_5 UART only GPIO
0x2B DIO_6 UART only GPIO
0x2C DIO_7 UART only GPIO
0x2D DIO_8 UART only GPIO
0x2E DIO_9 UART only GPIO
0x31 DIO_12 UART only GPIO
0x32 DIO_13 UART only GPIO
0x33 DIO_14 UART only GPIO
0x34 DIO_15 UART only GPIO
0x35 DIO_16 UART only GPIO
0x36 DIO_17 UART only GPIO
0x37 DIO_18 UART only GPIO
0x38 DIO_19 UART only GPIO
0x39 DIO_20 UART only GPIO
0x3A DIO_21 UART only GPIO
0x3B DIO_22 UART only GPIO
0x3C DIO_23 UART only GPIO
0x3D DIO_24 UART only GPIO
0x3E DIO_25 UART only GPIO
0x3F DIO_26 UART only GPIO
0x40 DIO_27 UART only GPIO
0x41 DIO_28 UART only GPIO
0x42 DIO_29 UART only GPIO
0x43 DIO_30 UART only GPIO
0x44 DIO_31 UART only GPIO
0x45 DIO_32 UART only GPIO
0x46 DIO_33 UART only GPIO
0x47 DIO_34 UART only GPIO
0x48 DIO_35 UART only GPIO
0x49 DIO_36 UART only GPIO
0x4A DIO_37 UART only GPIO
0x4B DIO_38 UART only GPIO
0x4C DIO_39 UART only GPIO
0x4E DIO_41 UART only GPIO
0x4F DIO_42 UART only GPIO
0x50 DIO_43 UART only GPIO
0x51 DIO_44 UART only GPIO
0x52 DIO_45 UART only GPIO
0x53 DIO_46 UART only GPIO
  1. While assigned to GPIO by default, this is used as an input to EN_WIFI_PWR
  2. While assigned to GPIO by default, this is used as an input to WIFI_RESET#

9.11.2.1 Modify Crossbar Assignments

All of the crossbar assignments are managed through the FPGA syscon registers, in the bank of registers labeled as "CROSSBARn". However, this can more easily be managed through the 'tshwctl' utility. The 'tshwctl' utility provides a pair of flags that make it quick to assign an input to an FPGA I/O. For example, normally UART 2 is set up to connect to the on-board Bluetooth module. However, if a model of TS-4100 does not have this module present, or it is not needed in a particular application, it can be assigned to another unused set of UART pins on the TS-SOCKET interface, like UARTC:

tshwctl --out 0x9 --in 0x1f  # Set UART2_RXD's input assignment to be UARTC_RXD. The UART2_RXD signal in the FPGA is connected directly to UART2_RXD on the CPU.
tshwctl --out 0x23 --in 0x5  # Set UARTC_TXD's input assignment to be UART2_TXD. The UART2_TXD signal in the FPGA is connected directly to UART2_TXD on the CPU.
tshwctl --out 0x10 --in 0x80 # Set WIFI_TXD's input assignment to GPIO. This prevents UART2_TXD data from appearing on this pin when unwanted.
tshwctl --out 0x11 --in 0x80 # Set WIFI_CTS's input assignment to GPIO. This prevents UART2_RTS data from appearing on this pin when unwanted.
Note: Using 'tshwctl' to set crossbar assignments also sets the the GPIO direction. The I/O number passed as --out is set to a low output, and the I/O number passed as --in is set to an input.


The latest sources for 'tshwctl' and other utilities can be found in the TS-4100 utilities github repository.


9.12 FPGA: TS-8820

The TS-8820 is powered by a Lattice XP2 FPGA with 5000 LUTs. Many of the features of the TS-8820 are driven by logic in this FPGA.

The CoM communicates with the TS-8820 FPGA using the MUXBUS, a simple address/data bus defined by Technologic Systems. Application developers do not need to understand the hardware layers involved to read/write the TS-8820 register map. See the demo application source, ts8820ctl.c, for more information on the software interface for the TS-8820.

For applications that require custom logic or interfaces please contact us regarding FPGA customization.


9.12.1 FPGA Registers

The 'ts8820ctl' application is able to perform arbitrary reads or writes to any of the TS-8820 FPGA registers. The flags "--read", "--write", and "--address" (where address is the 8-bit address listed in the table below) are used to perform this action.

Most of the access to the I/O is abstracted by 'ts8820ctl' and "ts8820.c", but it is also possible to access them directly through MUXBUS registers if applicable.

Offset Bits Description
0x0 15:0 Model ID: Reads 0x8820
0x2 15:11 Reserved
10 Pull-up 5-8 enable
9 Pull-up 3-4 enable
8 Pull-up 1-2 enable
7 H-bridge 2 enable (contacts go high-Z otherwise)
6 H-bridge 1 enable (contacts go high-Z otherwise)
5 H-bridge 2 direction
4 H-bridge 1 direction
3:0 FPGA Revision
0x4 15:14 Reserved
13:0 Digital inputs 14:1
0x6 15:10 Reserved
9:0 SRAM Page register
0x8 15:12 Reserved
11:6 Override Digital Outputs 6:1 with PWM
5:0 Digital Output Values 6:1
0xa 15:0 Reserved
0xc 15:0 Reserved
0xe 15:0 Reserved
0x10 15:13 PWM #1 Prescaler
12:0 PWM #1 Duty Cycle
0x12 15:13 PWM #2 Prescalar
12:0 PWM #2 Duty Cycle
0x14 15:13 PWM #3 Prescaler
12:0 PWM #3 Duty Cycle
0x16 15:13 PWM #4 Prescaler
12:0 PWM #4 Duty Cycle
0x18 15:13 PWM #5 Prescaler
12:0 PWM #5 Duty Cycle
0x1a 15:13 PWM #6 Prescaler
12:0 PWM #6 Duty Cycle
0x1c 15:13 PWM #7 Prescaler
12:0 PWM #7 Duty Cycle
0x1e 15:13 PWM #8 Prescaler
12:0 PWM #8 Duty Cycle
0x20 15:0 Pulse Counter #1 (RO)
0x22 15:0 Pulse Counter #2 (RO)
0x24 15:0 Pulse Counter #3 (RO)
0x26 15:0 Pulse Counter #4 (RO)
0x28 15:0 Pulse Counter #5 (RO)
0x2a 15:0 Pulse Counter #6 (RO)
0x2c 15:0 Pulse Counter #7 (RO)
0x2e 15:0 Pulse Counter #8 (RO)
0x30 15:0 Pulse Counter #9 (RO)
0x32 15:0 Pulse Counter #10 (RO)
0x34 15:0 Pulse Counter #11 (RO)
0x36 15:0 Pulse Counter #12 (RO)
0x38 15:0 Pulse Counter #13 (RO)
0x3a 15:0 Pulse Counter #14 (RO)
0x3c 15:0 Reserved
0x3e 15:0 Reserved
0x80 15:0 ADC Core ID (reads 0xadc1)
0x82 15:8 ADC Channel Mask (0 = do not save channel data)
7:6 Highest number chip to use (0-3, if 01 then sample chip 0 and chip 1)
5 1 = Force standby
4 1 = Use standby between samples to save power
3 1 = Smart DMA IRQ mode
2 1 = Enable IRQ
1 1 = Collect samples, 0 = stop
0 1 = Reset ADC chips and all FIFOs
0x84 15 1 = There has been a FIFO overflow since last reset
14:0 Number of samples available to be read
0x86 15:0 Sample Data (RO)
0x88 15:0 Sampling period LSB (RW)
0x8a 15:0 Sampling period MSB (RW)
0x8c 15:0 IRQ Threshold (RW)
0x8e 15:0 Reserved
0x90 15:0 Reserved
0x92 15:0 Reserved
0x94 15:0 Reserved
0x96 15:0 Reserved
0x98 15:0 Reserved
0x9a 15:0 Reserved
0x9c 15:0 Reserved
0x9e 15:0 Reserved
0xa0 15:0 DAC 1 Control Register
0xa2 15:0 DAC 2 Control Register
0xa4 15:0 DAC 3 Control Register
0xa6 15:0 DAC 4 Control Register


9.13 GPIO

The i.MX6UL CPU and FPGA GPIO are exposed using a kernel character device. This interface provides a set of files and directories for interacting with GPIO which can be used from any language that interact with special files in linux using ioctl() or similar. For our platforms, we pre-install the "libgpiod" library and binaries. Documentation on these tools can be found here. This section only covers using these userspace tools and does not provide guidance on using the libgpiod library in end applications. Please see the libgpiod documentation for this purpose.

A user with suitable permissions to read and write /dev/gpiochip* files can immediately interact with GPIO pins. For example, to read the push switch on the TS-8551-4100 which is connected to FPGA DIO_9:

gpioget 5 46

Multiple pins in the same chip can be read simultaneously by passing multiple pin numbers separated by spaces.

To write to a pin, the 'gpioset' command is used. For example, to set LCD_D02:

gpioset 2 7=0

Multiple pins in the same chip can be set simultaneously by passing multiple pin=value pairs separated by spaces.

If a call with 'gpioset' or 'gpioget' fails with "Device or resource busy," that means that specific GPIO is claimed by another device. The command 'cat /sys/kernel/debug/gpio' can be used to get a list of all of the system GPIO and what has claimed them.

The 'gpiomon' tool can be used to monitor pins for changes.


9.13.1 CPU GPIO Table

The GPIO table below is for all usable GPIO pins from the CPU of the TS-4100. The chip and pin numbers are listed for use with the GPIO control outlined above. Some pins can have additional functions outside of GPIO. Not every possible function is listed but we have tried to list the most useful functions. The default kernel assigned function is surrounded by parenthesis. See the CPU documentation for a full list of functions that can be assigned to GPIO pins. Note that changing any of the functions requires kernel device-tree modifications to reassign the CPU's IOMUX for any given pin.

Chip Pin Functions Location
0 0 (USB1 OTG ID) / GPIO CN2_074
0 1 (GPIO) / ADC input CN2_012
0 8 (PWM0) / ADC input / GPIO CN1_057
0 9 (PWM1) / ADC input / GPIO CN2_091
0 10 (Ethernet PHY power en.) / GPIO CN2_046
0 11 (I2S Master Clock) / GPIO CN2_054
0 12 (I2S TX Sync) / GPIO CN2_038
0 13 (I2S TX Bit Clock) / GPIO CN2_036
0 14 (I2S RX Data) / GPIO CN2_042
0 15 (I2S TX Data) / GPIO CN2_040
0 16 (Console UART TXD) / GPIO CN2_093 / Microcontroller
0 17 (Console UART RXD) / GPIO CN2_095 / Microcontroller
0 18 (GPIO) FPGA Crossbar SPARE_1
0 19 (GPIO) FPGA Crossbar SPARE_2
0 20 (UART1 TXD) / GPIO CN2_082
0 21 (UART1 RXD) / GPIO CN2_084
0 22 (CAN1 TX) / GPIO CN1_071
0 23 (CAN1 RX) / GPIO CN1_069
0 24 (UART2 TXD) / GPIO FPGA Crossbar UART2_TXD
0 25 (UART2 RXD) / GPIO FPGA Crossbar UART2_RXD
0 26 (UART2 CTS) / GPIO FPGA Crossbar UART2_CTS
0 27 (UART2 RTS) / GPIO FPGA Crossbar UART2_RTS
0 28 (UART3 TXD) / GPIO FPGA Crossbar UART3_TXD
0 29 (UART3 RXD) / GPIO FPGA Crossbar UART3_RXD
0 30 (UART4 TXD) / GPIO CN2_090
0 31 (UART4 RXD) / GPIO CN2_092
2 0 (GPIO) / LCD CLK CN1_049
2 1 (GPIO) / LCD DE CN1_055
2 2 (GPIO) / LCD HSYNC CN1_051
2 3 (GPIO) / LCD VSYNC CN1_053
2 7 (GPIO) / LCD D02 CN1_028
2 8 (GPIO) / LCD D03 CN1_030
2 9 (GPIO) / LCD D04 CN1_032
2 10 (GPIO) / LCD D05 CN1_034
2 11 (GPIO) / LCD D06 CN1_038
2 12 (GPIO) / LCD D07 CN1_040
2 13 (CAN0 TX) / GPIO CN2_097
2 14 (CAN0 RX) / GPIO CN2_099
2 15 (GPIO) / LCD D10 CN1_023
2 16 (GPIO) / LCD D11 CN1_025
2 17 (GPIO) / LCD D12 CN1_027
2 18 (GPIO) / LCD D13 CN1_031
2 19 (GPIO) / LCD D14 CN1_033
2 20 (GPIO) / LCD D15 CN1_035
2 21 (UART6 TXD) / GPIO FPGA Crossbar UART6_TXD
2 22 (UART6 RXD) / GPIO FPGA Crossbar UART6_RXD
2 23 (PWM4) / GPIO / LCD D18 CN1_041
2 24 (PWM5) / GPIO / LCD D19 CN1_043
2 25 (GPIO) / LCD D20 CN1_045
2 26 (GPIO) / LCD D21 CN1_042
2 27 (GPIO) / LCD D22 CN1_044
2 28 (GPIO) / LCD D23 CN1_046
3 10 (SPI2 Offboard CS#) / GPIO CN2_065 / HD1_13
3 11 (GPIO) FPGA_RESET#
3 12 (SPI2 FPGA CS#) / GPIO FPGA
3 13 (SPI2 CLK) / GPIO CN2_071 / HD1_15 / FPGA
3 14 (SPI2 MOSI) / GPIO CN2_067 / HD1_11 / FPGA
3 15 (SPI2 MISO) / GPIO CN2_069 / HD1_9 / FPGA
3 16 (GPIO) FPGA Crossbar SPARE_3
3 17 (GPIO) / Camera MCLK CN2_034
3 18 (GPIO) / Camera PIXCLK CN2_032
3 19 (GPIO) / Camera VSYNC CN2_072
3 20 (GPIO) / Camera HSYNC CN2_070
3 21 (GPIO) / Camera D0 CN2_052
3 22 (GPIO) / Camera D1 CN2_056
3 23 (GPIO) / Camera D2 CN2_058
3 24 (GPIO) / Camera D3 CN2_060
3 25 (GPIO) / Camera D4 CN2_062
3 26 (GPIO) / Camera D5 CN2_064
3 27 (GPIO) / Camera D6 CN2_066
3 28 (GPIO) / Camera D7 CN2_068
4 0 POWER_FAIL[1] N/A
4 1 ZPU IRQ FPGA
4 8 (Wi-Fi IRQ) / GPIO FPGA Crossbar SPARE_4
  1. Asserted when external power input falls below valid input range.


9.13.2 FPGA GPIO Table

The GPIO table below is for all usable GPIO pins from the FPGA of the TS-4100. The chip and pin numbers are listed for use with the GPIO control outlined above. The FPGA pins have an internal Crossbar MUX that can be used to re-assign pin functions. When the pin is set to have a crossbar input of "GPIO" then the FPGA GPIO can be controlled as standard GPIO. Note that some FPGA pins can only be inputs while others can only be outputs. See the FPGA register and crossbar sections for more information on this.

Chip Pin Signal Name Location[1] Default Crossbar Input
5 1 SPARE_1 CPU GPIO 0_18 GPIO
5 2 SPARE_2 CPU GPIO 0_19 GPIO
5 3 SPARE_3 CPU GPIO 3_16 GPIO
5 4 SPARE_4 CPU GPIO 4_8 WIFI_IRQ
5 5 UART2_TXD CPU UART2_TXD GPIO
5 6 UART2_CTS# CPU UART2_CTS# GPIO
5 7 UART3_TXD CPU UART3_TXD GPIO
5 8 UART6_TXD CPU UART6_TXD GPIO
5 9 UART2_RXD CPU UART2_RXD WIFI_RXD
5 10 UART2_RTS# CPU UART2_RTS# GPIO
5 11 UART3_RXD CPU UART3_RXD UARTA_RXD
5 12 UART6_RXD CPU UART6_RXD UARTB_RXD
5 13 WIFI_RXD Wi-Fi/BT Module TXD GPIO
5 14 WIFI_RTS# Wi-Fi/BT Module RTS# GPIO
5 15 WIFI_IRQ# Wi-Fi/BT Module IRQ GPIO
5 16 WIFI_TXD Wi-Fi/BT Module RXD UART2_TXD
5 17 WIFI_CTS# Wi-Fi/BT Module CTS# UART2_CTS#
5 18 ZPU_BREAK ZPU Output GPIO
5 19 ZPU_RESET ZPU Input GPIO
5 20 EN_WIFI_PWR Wi-Fi/BT Module CHIP_EN GPIO
5 21 WIFI_RESET# Wi-Fi/BT Module WIFI_RESET# GPIO
5 22 EN_USB_HOST_5V CN1_004 GPIO
5 23 EN_LCD_3V3 CN1_048 GPIO
5 24 ETH_PHY_RESET# Ethernet PHY GPIO
5 25 OFF_BD_RESET# CN1_009 GPIO
5 27 GREEN_LED# CN2_008 GPIO
5 28 RED_LED# CN2_006 GPIO
5 29 UARTA_RXD CN2_078 GPIO
5 30 UARTB_RXD CN2_088 GPIO
5 31 UARTC_RXD CN2_096 GPIO
5 32 UARTD_RXD CN2_100 GPIO
5 33 UARTA_TXD CN2_082 UART3_TXD
5 34 UARTB_TXD CN2_086 UART6_TXD
5 35 UARTC_TXD CN2_094 GPIO
5 36 UARTD_TXD CN2_098 GPIO
5 37 DIO_00 CN1_093 GPIO
5 38 DIO_01 CN1_091 GPIO
5 39 DIO_02 CN1_089 GPIO
5 40 DIO_03 CN1_087 GPIO
5 41 DIO_04 CN1_085 GPIO
5 42 DIO_05 CN1_083 GPIO
5 43 DIO_06 CN1_081 GPIO
5 44 DIO_07 CN1_079 GPIO
5 45 DIO_08 CN1_077 GPIO
5 46 DIO_09 CN1_073 GPIO
5 49 DIO_12 CN1_067 GPIO
5 50 DIO_13 CN1_065 GPIO
5 51 DIO_14 CN1_063 GPIO
5 52 DIO_15 CN1_061 GPIO
5 53 DIO_16 CN1_059 GPIO
5 54 DIO_17 CN1_097 GPIO
5 55 DIO_18 CN1_099 GPIO
5 56 DIO_19 CN1_100 GPIO
5 57 DIO_20 CN1_098 GPIO
5 58 DIO_21 CN1_096 GPIO
5 59 DIO_22 CN1_094 GPIO
5 60 DIO_23 CN1_092 GPIO
5 61 DIO_24 CN1_090 GPIO
5 62 DIO_25 CN1_088 GPIO
5 63 DIO_26 CN1_086 GPIO
5 64 DIO_27 CN1_084 GPIO
5 65 DIO_28 CN1_082 GPIO
5 66 DIO_29 CN1_080 GPIO
5 67 DIO_30 CN1_078 GPIO
5 68 DIO_31 CN1_076 GPIO
5 69 DIO_32 CN1_074 GPIO
5 70 DIO_33 CN1_072 GPIO
5 71 DIO_34 CN1_070 GPIO
5 72 DIO_35 CN1_068 GPIO
5 73 DIO_36 CN1_066 GPIO
5 74 DIO_37 CN1_064 GPIO
5 75 DIO_38 CN1_060 GPIO
5 76 DIO_39 CN1_058 GPIO
5 78 DIO_41 CN1_024 GPIO
5 79 DIO_42 CN1_026 GPIO
5 80 DIO_43 CN1_019 GPIO
5 81 DIO_44 CN1_021 GPIO
5 82 DIO_45 CN1_037 GPIO
5 83 DIO_46 CN1_039 GPIO
  1. GPIO pins are formatted in "<chip>_<pin>" notation.


9.14 H Bridge

Note: Support for this feature requires the use of the TS-4100 ZPU to handle MUXBUS transactions to the TS-8820. See this section for setup information.


The TS-8820 is able to support dual H Bridge drivers via an ST L6205 DMOS Dual Full Bridge driver. Through the TS-8820, each H Bridge can be independently controlled in all states of operation -- forward, reverse, coast (free-wheel), and brake -- with either a PWM signal or a constant drive voltage. PWM can be used to ramp up or down an attached load as well as to maintain it at a constant specified rate.

The H Bridge power source is from the main power supply. Please ensure that the input is able to supply enough power to the load in order to not disrupt the rest of the system operations.

The two H Bridges are exposed on the P6 terminal block, pins 1 through 4. The first output pair is marked "1A" and "1B," with the second pair being "2A" and "2B."

Below are some examples of controlling the H Bridges from the command line:

# Set H Bridge 1 to forward direction at 75% duty cycle
ts8820ctl --hbridge1 --fwd 750
 
# Set H Bridge 2 to reverse direction at 100% duty cycle
ts8820ctl --hbridge2 --rev 1000
 
# Brake H Bridge 1 (turns off PWM and grounds both sides of the H Bridge)
ts8820ctl --hbridge1 --brake
 
# Let H Bridge 2 coast to a stop, aka free-wheel
ts8820ctl --hbridge2 --coast

Additionally, the "--prescaler" flag can be passed to adjust the driving frequency:

# 381 Hz @ 50% duty cycle in the forward direction
ts8820ctl --hbridge1 --fwd 500 --prescaler 5

The prescaler value is 0-7, the output frequency can be calculated with (12207/(2^prescaler)). A lookup table has been provided below.

H Bridge PWM Freq.
Prescaler Freq.
0[1] 12207 Hz
1 6103 Hz
2 3052 Hz
3 1526 Hz
4 763 Hz
5 381 Hz
6 191 Hz
7 95 Hz
  1. Default if prescaler is unspecified.

9.15 I2C

The i.MX6UL supports standard I2C at 100khz, or using fast mode for 400khz operation. The CPU has 2 I2C buses used on the TS-4100.

I2C 1 is internal to the TS-4100 and only connects to the on-board supervisory microcontroller.

/dev/i2c-0
Address Device
0x4A Supervisory Microcontroller

The second I2C bus is brought out on CN2_28 (SCL) and CN2_30 (SDA). This bus is shared with the on-board FPGA and runs at 400 kHz by default.

/dev/i2c-2
Address Device
0x28-0x2F FPGA
Note: It is also possible to request the kernel to use arbitrary GPIO pins as an I2C interface. See an example here.

The kernel makes the I2C busses available at /dev/i2c-#. The "i2c-tools" (i2cdetect, i2cget, i2cset) package can be used to interact with the bus. Or a specific application can be created.


9.16 Interrupts

Note: This section is incomplete at this time

The i.MX6UL CPU GPIO are also able to function as interrupts on rising and falling edges. This is accessible from the kernel as well as userspace. Userspace IRQs and handled via libgpiod.


9.17 Isolated CAN Port

The TS-8820 provides an isolated CAN port on the P10 terminal block. The CAN interface itself is from the CoM with the TS-8820 facilitating the isolated physical interface.

More information about controlling the CAN interface can be found in the CAN section.


9.18 Isolated RS-232

The TS-8820 provides a single isolated RS-232 port on the P10 terminal block. The UART interface itself is from the CoM with the TS-8820 facilitating the isolated RS-232 physical interface.

By default, this UART port is connected to the ttymxc1 device on the TS-4100.


9.19 Isolated RS-485

The TS-8820 provides a single isolated RS-485 port on the P10 terminal block. The UART interface itself is from the CoM with the TS-8820 facilitating the isolated RS-485 physical interface.

By default, this port is connected to the ttymxc3 on the TS-4100.

The TS-4100 uses an automatic TXEN for half-duplex RS-485 handled by a CPU GPIO pin. However in order for this to function, it is necessary to modify the TS-4100 FPGA crossbar mux to route this CPU GPIO pin to the TXEN pin on the TS-8820. The following command needs to be run each time the unit is powered on in order for RS-485 to properly function:

tshwctl --out 0x31 --in 0x1

This connects the CPU GPIO pin directly to the RS-485 TXEN pin on the TS-8820 via internal switches in the TS-4100 FPGA.


9.20 LEDs

The kernel provides access to control the LEDs using the sysfs:

# Set Red led on
echo 1 > /sys/class/leds/red-led/brightness
# Set Red led off
echo 0 > /sys/class/leds/red-led/brightness
 
# Set Green led on
echo 1 > /sys/class/leds/green-led/brightness
# Set Green led off
echo 0 > /sys/class/leds/green-led/brightness

The kernel provides various triggers that can be useful for debugging purposes. The trigger for a given LED is in its directory:

echo "heartbeat" > /sys/class/leds/red-led/trigger
Trigger value LED toggles on
none Default, no action
rc-feedback IR Reciever trigger [1]
can0-tx CAN0 transmit activity
can0-rx CAN0 receive activity
can0-rxtx CAN0 activity
can1-tx CAN1 transmit activity
can1-rx CAN1 receive activity
can1-rxtx CAN1 activity
mmc0 MicroSD activity
mmc1 eMMC activity
timer 2hz blink
oneshot Blinks after delay. [2]
heartbeat Similar to timer, but varies the period based on system load
backlight Toggles on FB_BLANK
gpio Toggle based on a specified gpio. [3]
cpu0 Blink on CPU core 0 activity
default-on Only turns on by default. Only useful for device tree.
transient Specify on/off with time to turn off. [4]
  1. There is no IR directly on the TS-4100, this would be from a USB peripheral.
  2. See the Kernel documentation for more details on "oneshot" operation.
  3. When this trigger is set, a "gpio" file appears in the same directory which can be used to specify what GPIO to follow when it blinks
  4. See the Kernel documentation for more details on "transient" operation.


9.20.1 TS-8820 LEDs

The TS-8820 has 27 LEDs used to indicate the electrical status of the inputs and outputs on the device. LEDs are labelled as "LED#" on the PCB silkscreen.

The majority of the LEDs are not able to be directly controlled, they turn on or off as a reaction to the status of the I/O they are connected to. For example, when DIG_OUT1 is set, LED17 will turn on. The "System" LEDs are the exception to this and are controlled via the CoM LED interface.

LED FUNCTION --- LED FUNCTION
1 System RED_LED 2 Doesn't exist.
3 System Power 4 System GREEN_LED
5 RELAY_1 6 RELAY_2
7 RELAY_3 8 RELAY_4
9 DIG_IN1 10 DIG_IN2
11 DIG_IN3 12 DIG_IN4
13 DIG_IN5 14 DIG_IN6
15 DIG_IN7 16 DIG_IN8
17 DIG_OUT1 18 DIG_OUT2
19 DIG_OUT3 20 DIG_OUT4
21 DIG_IN9 22 DIG_IN10
23 DIG_IN11 24 DIG_IN12
25 DIG_IN13 26 DIG_IN14
27 DIG_OUT5 28 DIG_OUT6


9.21 microSD Card Interface

The i.MX6UL SDHCI driver supports microSD (0-2 GB), microSDHC (2-32 GB), and microSDXC(32-2048 GB). The cards available on our website on average support up to 16MB/s read, and 22MB/s write using this interface. Sandisk Extreme cards with UHS support have shown 58MB/s Read and 59MB/s write. The Linux driver provides access to this socket at /dev/mmcblk0 as a standard Linux block device.

This graph shows our SD write endurance test for 40 TS-7553 boards running a doublestore stress test on 4GB Sandisk microSD cards. A failure is marked on the graph for a card once a single bit of corruption is found.

See the i.MX6UL reference manual for more information on this controller.

We have performed compatibility testing on the Sandisk microSD cards we provide, and we do not suggest switching brands/models without performing qualification testing. Though SD cards in theory will all follow the standard and just work, in practice cards vary significantly and can fail in subtle ways. We do not recommend ATP or Transcend microSD cards specifically due to known corruption issues that can occur after many GB of written data.

Our testing has shown that on average microSD cards will last between 6-12 TB of written data before showing a single bit of corruption. This is enough for most applications to write for years and not see any issues, but for more reliable consider the eMMC which is expected to last over 100 TB of writes. Higher end SD cards can also extend this, but industrial grade SD cards typically carry a cost much higher than the eMMC.

SD cards in general should not be powered down during a write/erase cycle, doing so will eventually lead to disk corruption. It is not always possible for 'fsck' to recover from the types of failures that will be seen with SD power loss. The system should be designed to avoid power loss to SD cards, or the eMMC module should be used for storage instead which can be configured to be resilient to power loss.


9.22 Relays

The TS-8820 provides 4 mechanical SPDT relays. Each relay has a common connection, a normally open (NO), and normally closed (NC) contact. All 4 sets of contacts are located on the P8 terminal block.

These 4 relays are manipulated by GPIO from the CoM, not the TS-8820 itself. The relays are controlled by the following GPIO pins:

Relay DIO
1 DIO_8
2 DIO_7
3 DIO_6
4 DIO_4

See the TS-4100 FPGA GPIO table for information on how to manipulate the DIO pins for the relays.


9.23 RTC

On this platform, the NXP SNVS Low Power Realtime Clock (RTC) module inside of the i.MX6UL CPU is used at the hardware clock. This is presented as "/dev/rtc0" from the Linux kernel and is accessed using the standard hwclock command. In order to keep time, there must be a constant 3.3 V provided on CN1_36 to keep the RTC active.

For proper operation of the RTC, a CR2450 coin cell must be set in the battery holder on the TS-8820. This will allow the TS-4100 SNVS RTC to maintain time when the system is powered off.

9.24 SPI

The default kernel sets up two SPI controllers. One to the Onboard WIFI, and the other to the FPGA and offboard chip selects. SPI is accessible through either specific kernel drivers, or userspace using the /dev/spi interface. See the kernel compile guide here for more details.

Open the baseboard dts from arch/arm/boot/dts/imx6ul-ts4100-<baseboardid>.dtsi, or the generic imx6ul-ts4100.dtsi. The kernel requires a spidev device be added to the relevant ECSPI controller. For example:

&ecspi3 {
	fsl,spi-num-chipselects = <2>;
	cs-gpios = <&gpio4 12 0>, <&gpio4 10 0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi3>;
	status = "okay";
 
	spidevfpga: spi@0 {
		compatible = "spidev";
		reg = <0>;
		spi-max-frequency = <1000000>;
	};
 
	spioffbd: spi@1 {
		compatible = "spidev";
		reg = <1>;
		spi-max-frequency = <1000000>;
	};
};

In this case the two spidev devices are set to 1MHz. To adjust this further you will need to modify the kernel for your device. Linux will create two devices for the above spidev nodes:

  • /dev/spidev2.0 #FPGA
  • /dev/spidev2.1 #offboard

The FPGA SPI is left to custom ZPU code. You can also add additional CPU GPIO to the cs-gpios section to create more chip selects. For further information on the SPI programming see the kernel example code and documentation:


9.25 Supervisory Microcontroller

The TS-4100 includes an on-board supervisory microcontroller. It is an 8051 based device that has a number of operational responsibilities. It creates a USB serial UART for the debug UART, manages power-up and reset sequencing which includes deep sleep mode, manages charging the TS-SILO SuperCaps, is the system WDT, and has a number of ADC inputs of various system voltages.

Information about the microcontroller as well as output from its internal ADCs can be retrieved with the command:

tsmicroctl -i


Since the microcontroller handles power-up and reset, it includes a low power "sleep" mode that removes power from the CPU and all peripherals for a predefined period of time. Note that as soon as the sleep command is issued, the microcontroller will more power from all peripherals. Care must be taken to ensure there is no damage to peripherals or datalosses occurring during this sudden power-off event. It is recommended to run this command as the last step after a proper Linux shutdown sequence.

Sleep mode can be entered with the command:

tsmicroctl --sleep <time in seconds>

After the internal timer expires, the microcontroller will run the power-up sequence and boot the whole system back up normally.


On platforms that support TS-SILO supercapacitor backup, 'tsmicroctl' can be used to control that charging from userspace. The microcontroller itself has been carefully tuned to charge the supercapacitors at a safe rate, these parameters are not adjustable. However charging can be enabled and disabled from the command line:

# Enable charging
tsmicroctl --tssiloon
 
# Disable charging
tsmicroctl --tssilooff


9.26 UARTs

The FPGA includes a crossbar to select where UARTs are routed so these can be changed. Below are the default mappings.

UART TX RX TXEN
ttymxc0 CN2_93 CN2_95 N/A
ttymxc1 CN2_82 CN2_84 N/A
ttymxc2 Onboard Bluetooth RX Onboard Bluetooth TX N/A
ttymxc3 CN2_78 CN2_80 N/A
ttymxc4 CN2_90 CN2_92 N/A
ttymxc6 CN2_86 CN2_88 N/A

9.26.1 TS-8820 Mappings

The host UARTs are mapped to the following ports on the TS-8820:

UART Type TX/+ RX/-
ttymxc0 RS-232 DB9, pin 3 DB9, pin 2
ttymxc1 RS-232 P10, pin 7 P10, pin 8
ttymxc2 TTL NA NA
ttymxc3 RS-485 P10, pin 5 P10, pin 6
ttymxc6 RS-232 DB9, pin 7 DB9, pin 8
NC[1] RS-485 DB9, pin 1 DB9, pin 6
  1. This port is normally not connected to any CPU UARTs due to the pinout. It is possible with the Crossbar MUX to re-assign UART3 to this physical port. Additionally, SPARE_1 must be assigned as a Crossbar input to DIO_14 as DIO_14 is connected to this UART's TXEN pin.

9.27 USB

9.27.1 USB Host

The TS-4100 provides a standard USB 2.0 host supporting 480Mb/s. Typically this is interfaced with by using standard Linux drivers, but low level USB communication is possible using libusb.

The TS-8820 brings out two USB type A host ports on the side of the device.


9.28 Watchdog

The kernel provides an interface to the watchdog driver at /dev/watchdog. Refer to the kernel documentation for more information:


9.29 WIFI

This board uses an ATWILC3000-MR110CA IEEE 802.11 b/g/n Link Controller Module With Integrated Bluetooth® 4.0. Linux provides support for this module using the wilc3000 driver.

Summary features:

  • IEEE 802.11 b/g/n RF/PHY/MAC SOC
  • IEEE 802.11 b/g/n (1x1) for up to 72 Mbps PHY rate
  • Single spatial stream in 2.4GHz ISM band
  • Integrated PA and T/R Switch Integrated Chip Antenna
  • Superior Sensitivity and Range via advanced PHY signal processing
  • Advanced Equalization and Channel Estimation
  • Advanced Carrier and Timing Synchronization
  • Wi-Fi Direct and Soft-AP support
  • Supports IEEE 802.11 WEP, WPA, and WPA2 Security
  • Supports China WAPI security
  • Operating temperature range of -40°C to +85°C


9.30 ZPU

The on-board FPGA contains a ZPU core.

The ZPU is a 32-bit stack based CPU with a full gcc compiler available for it. Our specific implementation gives it a single length of contiguous FPGA BlockRAM for code and data storage. The ZPU can be used to offload processing tasks, perform real-time operations, or facilitate communication between the ZPU and external peripherals. The ZPU is controlled completely from userspace using the 'tszpuctl' utility. This utility can load binaries, compile and load from source code, control reset of the ZPU, dump the entire memory space, or connect stdin and stdout from the terminal to the ZPU.

The ZPU has a total of 8192 bytes of RAM for shared code, data, and stack space. After exiting from reset, it begins execution from the lowest address with the stack starting from the highest address of RAM. The entire RAM address space is accessible through the FPGA interface. This is how applications are loaded in to the ZPU. It is also used for the communication FIFO and can be used as a way to quickly extract the entire contents of the ZPU for debugging or other purposes.


9.30.1 ZPU FIFO

A RAM based communication channel can be created to facilitate data transmission between the running ZPU and the main CPU. This channel is agnostic of the connection between the FPGA and the CPU. So long as the CPU can read and write any arbitrary address in the ZPU memory space, this channel is available. It is a bidirectional communication channel for arbitrary data between the ZPU and CPU.

The FIFO is implemented in software. There is an API for code running on the ZPU as well as a separate API for userspace software running on the CPU.

The ZPU reserves 256 bytes for TX and 16 bytes for RX at runtime in a structure. The base of this structure is placed at a known memory location. The CPU can then read from this memory location which contains the size of each FIFO, the head and tail of each FIFO, and other options for the FIFO.

When the ZPU needs to send data to the CPU it writes the bytes to the next free TXFIFO entries, updates the TXFIFO head pointer, and then raises the IRQ to the CPU. In order to assert an IRQ, the ZPU writes an address to the IRQ register. The IRQ remains asserted until the CPU reads from the address written to the IRQ register, or the ZPU is reset. For this reason, the FIFO implementation writes the address of the current TXFIFO head to the IRQ register. Once the CPU reads from the head address, the IRQ will deassert. The CPU sees the interrupt, reads from the current tail through the head of the TXFIFO, and then updates the new tail address when completed. There is an option for "flow control" which will prevent the ZPU from writing additional data to the TXFIFO if it is full.

When the CPU needs to send data to the ZPU, it writes data directly in to the ZPU RXFIFO and then changes the head. The ZPU is required to poll for changes in the head position in its RXFIFO. Once it sees a difference, it reads a byte from the RXFIFO and then changes the tail position.


9.30.2 ZPU Demo

We have included a demo ZPU application that simply shows how the ZPU can interact directly with FPGA I/O, as well as an example of the ZPU FIFO implementation. The ZPU can be loaded and started with one command, and the FIFO can be connected to with another:

tszpuctl --load /usr/local/bin/zpu/zpu_demo.bin
tszpuctl --connect

The 'tszpuctl --connect' connects the ZPU FIFO directly to the terminal's stdin and stdout. The "zpu_demo.bin" application will toggle the red and green LEDs with every character typed, as well as echo every character back. When enter/return is pressed, the ZPU will display the number of timer ticks since the last character the ZPU received. The standard "ctrl+c" escape sequence is used to exit from 'tszpuctl'.


9.30.3 Building ZPU Applications

Note: This section is incomplete at this time


Source code for 'tzpuctl' as well as our ZPU applications and APIs are available in the TS-4100 utilities repository.


10 Specifications

Note: This section is incomplete at this time.

10.1 Power Specification

10.2 Power Consumption

10.3 I/O Specifications

10.4 Power Output

11 External Interfaces

11.1 Terminal Blocks

Note: Rev A TS-8820 PCBs have incorrect P1-P10 silkscreens. Use the diagram below.

8820-pinout.png

P1
Pin Description
1 IN1+
2 IN1-
3 IN2+
4 IN2-
5 IN3+
6 IN3-
7 IN4+
8 IN4-
9 IN5+
10 IN5-
11 IN6+
12 IN6-
P2
Pin Description
1 IN9
2 IN10
3 Ground
4 IN11
5 IN12
6 Ground
7 IN13
8 IN14
9 Ground
10 OUT5
11 OUT6
12 Ground
P3
Pin Description
1 ADC Channel 13
2 Ground
3 ADC Channel 14
4 Ground
5 ADC Channel 15
6 Ground
7 ADC Channel 16
8 Ground
9 DAC 1
10 Ground
11 DAC 2
12 Ground
P4
Pin Description
1 ADC Channel 7
2 Ground
3 ADC Channel 8
4 Ground
5 ADC Channel 9
6 Ground
7 ADC Channel 10
8 Ground
9 ADC Channel 11
10 Ground
11 ADC Channel 12
12 Ground
P5
Pin Description
1 ADC Channel 1
2 Ground
3 ADC Channel 2
4 Ground
5 ADC Channel 3
6 Ground
7 ADC Channel 4
8 Ground
9 ADC Channel 5
10 Ground
11 ADC Channel 6
12 Ground
P6
Pin Description
1 HB_OUT1A
2 HB_OUT1B
3 HB_OUT2A
4 HB_OUT2B
5 Ground
6 Ground
7 Ext. Power (10 V to 30 VDC)
8 Ext. Power (10 V to 30 VDC)
9 Ext. Power (10 V to 30 VDC)
10 Ext. Ground
11 Ext. Ground
12 Ext. Ground
P7
Pin Description
1 IN7+
2 IN7-
3 IN8+
4 IN8-
5 OUT1+
6 OUT1-
7 OUT2+
8 OUT2-
9 OUT3+
10 OUT3-
11 OUT4+
12 OUT4-
P8
Pin Description
1 Relay 1 NO
2 Relay 1 COM
3 Relay 1 NC
4 Relay 2 NO
5 Relay 2 COM
6 Relay 2 NC
7 Relay 3 NO
8 Relay 3 COM
9 Relay 3 NC
10 Relay 4 NO
11 Relay 4 COM
12 Relay 4 NC
P9
Pin Description
1 DAC 3
2 Ground
3 DAC 4
4 Ground
5 Spare 1[1]
6 Spare 2[1]
7 Spare 3[1]
8 Spare 4[1]
9 Spare 5[1]
10 Spare 6[1]
11 Spare 7[1]
12 Spare 8[1]
P10
Pin Description
1 Not Connected
2 Not Connected
3 Isolated Common (RS-485 & RS-232)
4 Isolated Common (RS-485 & RS-232)
5 Isolated RS-485 +
6 Isolated RS-485 -
7 Isolated RS-232 TXD
8 Isolated RS-232 RXD
9 Not Connected
10 Isolated CAN Common
11 Isolated CAN_H
12 Isolated CAN_L
  1. 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 "Spare" pins on P9 are unused at this time, intended for future expansion.

11.2 Ethernet Connector

The TS-8820 can connect to any 10/100 Ethernet LAN. The Ethernet connector includes LEDs indicating link and activity. The link LED will be illuminated when the TS-8820 is powered on and connected to a network. This connector also allows the TS-8820 to be powered by PoE.


11.3 USB Host

The USB is available on two ports as a USB 2.0 host.

USB Host
Header PIN Name
1 USB_5V
2 HOSTA_USB_M
3 HOSTA_USB_P
4 GND


11.4 DB9 Connector

DB9 Connector
Pin Description
1 RS-485 +
2 Debug Console RS-232 RXD
3 Debug Console RS-232 TXD
4 Not Connected
5 Ground
6 RS-485 -
7 RS-232 TXD
8 RS-232 RXD
9 Not Connected


11.5 Current Loop Jumpers

Situated in the middle of the terminal blocks are two 2x8 jumper headers that are numbered on the right side of the headers. Starting from 16 at the top, down to 1 at the bottom; setting a jumper on a particular number enables a 220 ohm, 0.5 % resistor that turns the respective ADC channel in to a current loop sensor. For example, setting a jumper on the pins marked as "15" will enable 4-20 mA current input measurement on ADC channel 15.


11.6 TS-SOCKET

Connection between the TS-4100 and TS-8820 is provided by our high-density TS-SOCKET interface standard. This standard specifies certain pin functions for both our CoM modules and baseboards to allow for as much cross-compatibility as possible.

The final TS-8820-4100 stack means that the end developer does not need to be concerned with the TS-SOCKET pinout. However, more information about the TS-4100 interface can be found in the TS-4100 manual.

12 Revisions and Changes

12.1 TS-4100 PCB Revisions

Revision Changes
A
  • Initial Release
B
  • Removed power toggle for FPGA_3.3V
  • Added additional resistor straps to determine build type
  • ETH_PHY_IRQ disconnected
  • Added pullups to phy pins 19/30 for correct strapping
  • PHY uses FPGA DIO for reset
  • Added supercap fixes
  • Remove U19 FPGA reset IC, using CPU GPIO instead
  • Allow power to be switched to the eMMC
  • Added pulldown on SPI MOSI to identify REV B boards
  • OFF_BD_RESET# has 47K pulldown resistor
  • No CHRG jumper moved to FPGA IO
C
  • Add pullup to eMMC enable
  • Adjust RAM voltage to 1.5 V to be compatible with standard and low power
  • EXT_RESET# now able to cause microcontroller reset
  • SD pullup to SD_POWER rail, allows for proper 1.8 V UHS operation
  • Removed SD traces to TS-SOCKET, caused signal integrity issues

12.2 TS-4100 U-Boot Changelog

Revision Changes
July 2, 2019 Initial pre-production release

12.3 TS-4100 FPGA Changelog

Revision Changes
0x0A Initial pre-production release
0x0B
  • Disconnect PHY_RESET# from crossbar SPARE_3
  • SPARE_3 and SPARE_2 assigned as crossbar inputs to wifi control signals (needed for 4.9 kernel driver)

12.4 Software Images

12.4.1 Debian Changelog

Revision Changes
ts4100-armhf-stretch-20190702.tar.xz Initial pre-production release.


13 Product Notes

13.1 FCC Advisory

This equipment generates, uses, and can radiate radio frequency energy and if not installed and used properly (that is, in strict accordance with the manufacturer's instructions), may cause interference to radio and television reception. It has been type tested and found to comply with the limits for a Class A digital device in accordance with the specifications in Part 15 of FCC Rules, which are designed to provide reasonable protection against such interference when operated in a commercial environment. Operation of this equipment in a residential area is likely to cause interference, in which case the owner will be required to correct the interference at his own expense.

If this equipment does cause interference, which can be determined by turning the unit on and off, the user is encouraged to try the following measures to correct the interference:

Reorient the receiving antenna. Relocate the unit with respect to the receiver. Plug the unit into a different outlet so that the unit and receiver are on different branch circuits. Ensure that mounting screws and connector attachment screws are tightly secured. Ensure that good quality, shielded, and grounded cables are used for all data communications. If necessary, the user should consult the dealer or an experienced radio/television technician for additional suggestions. The following booklets prepared by the Federal Communications Commission (FCC) may also prove helpful:

How to Identify and Resolve Radio-TV Interference Problems (Stock No. 004-000-000345-4) Interface Handbook (Stock No. 004-000-004505-7) These booklets may be purchased from the Superintendent of Documents, U.S. Government Printing Office, Washington, DC 20402.

13.2 Limited Warranty

Technologic Systems warrants this product to be free of defects in material and workmanship for a period of one year from date of purchase. During this warranty period Technologic Systems will repair or replace the defective unit in accordance with the following process:

A copy of the original invoice must be included when returning the defective unit to Technologic Systems, Inc. This limited warranty does not cover damages resulting from lightning or other power surges, misuse, abuse, abnormal conditions of operation, or attempts to alter or modify the function of the product.

This warranty is limited to the repair or replacement of the defective unit. In no event shall Technologic Systems be liable or responsible for any loss or damages, including but not limited to any lost profits, incidental or consequential damages, loss of business, or anticipatory profits arising from the use or inability to use this product.

Repairs made after the expiration of the warranty period are subject to a repair charge and the cost of return shipping. Please, contact Technologic Systems to arrange for any repair service and to obtain repair charge information.

WARNING: Writing ANY of the CPU's One-Time Programmable registers will immediately void ALL of our return policies and replacement warranties. This includes but is not limited to: the 45-day full money back evaluation period; any returns outside of the 45-day evaluation period; warranty returns within the 1 year warranty period that would require SBC replacement. Our 1 year limited warranty still applies, however it is at our discretion to decide if the SBC can be repaired, no warranty replacements will be provided if the OTP registers have been written.